Follow
Huawei Li
Title
Cited by
Cited by
Year
DeepBurning: automatic generation of FPGA-based learning accelerators for the neural network family
Y Wang, J Xu, Y Han, H Li, X Li
Proceedings of the 53rd Annual Design Automation Conference, 110, 2016
2692016
Engn: A high-throughput and energy-efficient accelerator for large graph neural networks
S Liang, Y Wang, C Liu, L He, LI Huawei, D Xu, X Li
IEEE Transactions on Computers 70 (9), 1511-1525, 2020
1962020
An abacus turn model for time/space-efficient reconfigurable routing
B Fu, Y Han, J Ma, H Li, X Li
Proceeding of the 38th annual international symposium on Computer …, 2011
1232011
On topology reconfiguration for defect-tolerant NoC-based homogeneous manycore systems
L Zhang, Y Han, Q Xu, X Li, H Li
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 17 (9 …, 2009
942009
ChipGPT: How far are we from natural language hardware design
K Chang, Y Wang, H Ren, M Wang, S Liang, Y Han, H Li, X Li
arXiv preprint arXiv:2305.14019, 2023
672023
Cognitive {SSD}: A Deep Learning Engine for In-Storage Data Retrieval
S Liang, Y Wang, Y Lu, Z Yang, H Li, X Li
2019 {USENIX} Annual Technical Conference ({USENIX}{ATC} 19), 395-410, 2019
672019
Zonedefense: A fault-tolerant routing for 2-d meshes without virtual channels
B Fu, Y Han, H Li, X Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (1), 113-126, 2014
602014
SoftPCM: Enhancing energy efficiency and lifetime of phase change memory in video applications via approximate write
Y Fang, H Li, X Li
2012 IEEE 21st Asian Test Symposium, 131-136, 2012
522012
Automatic Test Program Generation Using Executing-Trace-Based Constraint Extraction for Embedded Processors
Y Zhang, H Li, X Li
IEEE Transactions on Very Large Scale Integration Systems 21 (7), 1220-1233, 2013
452013
DeepBurning-GL: an automated framework for generating graph neural network accelerators
S Liang, C Liu, Y Wang, H Li, X Li
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2020
442020
Retraining-based timing error mitigation for hardware neural networks
J Deng, Y Fang, Z Du, Y Wang, H Li, O Temam, P Ienne, D Novo, X Li, ...
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 593-596, 2015
432015
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System
D Xu, Z Zhu, C Liu, Y Wang, S Zhao, L Zhang, H Liang, H Li, KT Cheng
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (3), 472-484, 2021
422021
RRAMedy: Protecting ReRAM-Based Neural Network from Permanent and Soft Faults During Its Lifetime
W Li, Y Wang, H Li, X Li
2019 IEEE 37th International Conference on Computer Design (ICCD), 91-99, 2019
422019
nGFSIM: A GPU-Based Fault Simulator for 1-to-n Detection and its Applications
H Li, D Xu, Y Han, KT Cheng, X Li
Test Conference (ITC), 2010 IEEE International, 1-10, 2010
422010
Real-time meets approximate computing: An elastic CNN inference accelerator with adaptive trade-off between QoS and QoR
Y Wang, H Li, X Li
Proceedings of the 54th Annual Design Automation Conference 2017, 33, 2017
402017
Fault Tolerance Mechanism in Chip Many-Core Processors*
L Zhang, Y Han, H Li, X Li
Tsinghua Science & Technology 12, 169-174, 2007
392007
FCN-engine: accelerating deconvolutional layers in classic CNN processors
D Xu, K Tu, Y Wang, C Liu, B He, H Li
Proceedings of the International Conference on Computer-Aided Design, 22, 2018
382018
A fault criticality evaluation framework of digital systems for error tolerant video applications
Y Fang, H Li, X Li
2011 Asian Test Symposium, 329-334, 2011
382011
An on-chip clock generation scheme for faster-than-at-speed delay testing
S Pei, H Li, X Li
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
382010
Robust test generation for precise crosstalk-induced path delay faults
H Li, P Shen, X Li
VLSI Test Symposium, 2006. Proceedings. 24th IEEE, 6 pp.-305, 2006
382006
The system can't perform the operation now. Try again later.
Articles 1–20