| The future of wires R Ho, KW Mai, MA Horowitz Proceedings of the IEEE 89 (4), 490-504, 2001 | 1969 | 2001 |
| Smart memories: A modular reconfigurable architecture K Mai, T Paaske, N Jayasena, R Ho, WJ Dally, M Horowitz Proceedings of the 27th annual international symposium on Computer …, 2000 | 619 | 2000 |
| Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis Y Cai, EF Haratsch, O Mutlu, K Mai 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 521-526, 2012 | 490 | 2012 |
| Threshold voltage distribution in MLC NAND flash memory: Characterization, analysis, and modeling Y Cai, EF Haratsch, O Mutlu, K Mai 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 395 | 2013 |
| Multi-bit error tolerant caches using two-dimensional error coding J Kim, N Hardavellas, K Mai, B Falsafi, J Hoe 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2007 | 376 | 2007 |
| Data retention in MLC NAND flash memory: Characterization, optimization, and recovery Y Cai, Y Luo, EF Haratsch, K Mai, O Mutlu 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 347 | 2015 |
| Single-chip heterogeneous computing: Does the future include custom logic, FPGAs, and GPGPUs? ES Chung, PA Milder, JC Hoe, K Mai 2010 43rd annual IEEE/ACM international symposium on microarchitecture, 225-236, 2010 | 346 | 2010 |
| Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime Y Cai, G Yalcin, O Mutlu, EF Haratsch, A Cristal, OS Unsal, K Mai 2012 IEEE 30th International Conference on Computer Design (ICCD), 94-101, 2012 | 314 | 2012 |
| Digital circuit design challenges and opportunities in the era of nanoscale CMOS BH Calhoun, Y Cao, X Li, K Mai, LT Pileggi, RA Rutenbar, KL Shepard Proceedings of the IEEE 96 (2), 343-365, 2008 | 277 | 2008 |
| Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation Y Cai, O Mutlu, EF Haratsch, K Mai 2013 IEEE 31st International Conference on Computer Design (ICCD), 123-130, 2013 | 267 | 2013 |
| Read disturb errors in MLC NAND flash memory: Characterization, mitigation, and recovery Y Cai, Y Luo, S Ghose, O Mutlu 2015 45th Annual IEEE/IFIP International Conference on Dependable Systems …, 2015 | 244 | 2015 |
| CoRAM: an in-fabric memory architecture for FPGA-based computing ES Chung, JC Hoe, K Mai Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011 | 209 | 2011 |
| Low-power SRAM design using half-swing pulse-mode techniques KW Mai, T Mori, BS Amrutur, R Ho, B Wilburn, MA Horowitz, I Fukushi, ... IEEE Journal of Solid-State Circuits 33 (11), 1659-1671, 1998 | 178 | 1998 |
| Vulnerabilities in MLC NAND flash memory programming: Experimental analysis, exploits, and mitigation techniques Y Cai, S Ghose, Y Luo, K Mai, O Mutlu, EF Haratsch 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 169 | 2017 |
| Efficient on-chip global interconnects R Ho, K Mai, M Horowitz 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2003 | 158 | 2003 |
| An efficient reliable PUF-based cryptographic key generator in 65nm CMOS M Bhargava, K Mai 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 146 | 2014 |
| ProtoFlex: Towards scalable, full-system multiprocessor simulations using FPGAs ES Chung, MK Papamichael, E Nurvitadhi, JC Hoe, K Mai, B Falsafi ACM Transactions on Reconfigurable Technology and Systems (TRETS) 2 (2), 1-32, 2009 | 121 | 2009 |
| Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS M Bhargava, C Cakir, K Mai 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 25-30, 2012 | 110 | 2012 |
| Neighbor-cell assisted error correction for MLC NAND flash memories Y Cai, G Yalcin, O Mutlu, EF Haratsch, O Unsal, A Cristal, K Mai ACM SIGMETRICS Performance Evaluation Review 42 (1), 491-504, 2014 | 107 | 2014 |
| Applications of on-chip samplers for test and measurement of integrated circuits R Ho, B Amrutur, K Mai, B Wilburn, T Mori, M Horowitz 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No …, 1998 | 106 | 1998 |
