| System-level modeling of microprocessor reliability degradation due to BTI and HCI CC Chen, S Cha, T Liu, L Milor 2014 IEEE International Reliability Physics Symposium, CA. 8.1-CA. 8.9, 2014 | 34 | 2014 |
| SRAM stability analysis for different cache configurations due to bias temperature instability and hot carrier injection T Liu, CC Chen, J Wu, L Milor 2016 IEEE 34th International Conference on Computer Design (ICCD), 225-232, 2016 | 30 | 2016 |
| System-level variation-aware aging simulator using a unified novel gate-delay model for bias temperature instability, hot carrier injection, and gate oxide breakdown T Liu, CC Chen, S Cha, L Milor Microelectronics Reliability 55 (9-10), 1334-1340, 2015 | 26 | 2015 |
| Comprehensive reliability-aware statistical timing analysis using a unified gate-delay model for microprocessors T Liu, CC Chen, L Milor IEEE Transactions on Emerging Topics in Computing 6 (2), 219-232, 2016 | 23 | 2016 |
| System-level modeling of microprocessor reliability degradation due to bias temperature instability and hot carrier injection CC Chen, T Liu, L Milor IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (8 …, 2016 | 22 | 2016 |
| A comprehensive time-dependent dielectric breakdown lifetime simulator for both traditional CMOS and FinFET technology K Yang, T Liu, R Zhang, L Milor IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (11 …, 2018 | 21 | 2018 |
| Comprehensive reliability and aging analysis on SRAMs within microprocessor systems T Liu, CC Chen, W Kim, L Milor Microelectronics Reliability 55 (9-10), 1290-1296, 2015 | 19 | 2015 |
| Accurate standard cell characterization and statistical timing analysis using multivariate adaptive regression splines T Liu, CC Chen, L Milor Sixteenth International Symposium on Quality Electronic Design, 272-279, 2015 | 18 | 2015 |
| Extraction of threshold voltage degradation modeling due to negative bias temperature instability in circuits with I/O measurements S Cha, CC Chen, T Liu, LS Milor 2014 IEEE 32nd VLSI Test Symposium (VTS), 1-6, 2014 | 18 | 2014 |
| Processor-level reliability simulator for time-dependent gate dielectric breakdown CC Chen, T Liu, S Cha, L Milor Microprocessors and Microsystems 39 (8), 950-960, 2015 | 11 | 2015 |
| Memory and logic lifetime simulation systems and methods L Milor, T Liu, CC Chen US Patent 10,514,973, 2019 | 10 | 2019 |
| Technologies for estimating remaining life of integrated circuits using on-chip memory L Milor, W Kim, T Liu US Patent 10,303,541, 2019 | 10 | 2019 |
| Multivariate adaptive regression splines in standard cell characterization for nanometer technology in semiconductor T Liu Chapter 3, 47-62, 2018 | 10 | 2018 |
| A comparison study of time-dependent dielectric breakdown for analog and digital circuit's optimal accelerated test regions K Yang, T Liu, R Zhang, L Milor 2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2017 | 10 | 2017 |
| Modeling of the reliability degradation of a FinFET-based SRAM due to bias temperature instability, hot carrier injection, and gate oxide breakdown R Zhang, T Liu, K Yang, L Milor 2017 IEEE International Integrated Reliability Workshop (IIRW), 1-4, 2017 | 10 | 2017 |
| Front-end of line and middle-of-line time-dependent dielectric breakdown reliability simulator for logic circuits K Yang, T Liu, R Zhang, DH Kim, L Milor Microelectronics Reliability 76, 81-86, 2017 | 10 | 2017 |
| SRAM stability analysis and performance–reliability tradeoff for different cache configurations R Zhang, T Liu, K Yang, CC Chen, L Milor IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (3), 620-633, 2020 | 8 | 2020 |
| Modeling of FinFET SRAM array reliability degradation due to electromigration R Zhang, KX Yang, TZ Liu, L Milor Microelectronics Reliability 100, 113485, 2019 | 8 | 2019 |
| Circuit-level reliability simulator for front-end-of-line and middle-of-line time-dependent dielectric breakdown in FinFET technology K Yang, T Liu, R Zhang, L Milor 2018 IEEE 36th VLSI Test Symposium (VTS), 1-6, 2018 | 8 | 2018 |
| Analysis of time-dependent dielectric breakdown induced aging of SRAM cache with different configurations R Zhang, T Liu, K Yang, L Milor Microelectronics Reliability 76, 87-91, 2017 | 8 | 2017 |
Rui ZhangGeorgia Institute of Technology在 gatech.edu 的电子邮件经过验证
