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Berkin Akin
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Data reorganization in memory using 3D-stacked DRAM
B Akin, F Franchetti, JC Hoe
ACM SIGARCH Computer Architecture News 43 (3), 131-143, 2015
2442015
Mobiledets: Searching for object detection architectures for mobile accelerators
Y Xiong, H Liu, S Gupta, B Akin, G Bender, Y Wang, PJ Kindermans, ...
Proceedings of the IEEE/CVF conference on computer vision and pattern …, 2021
1472021
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing
Q Zhu, B Akin, HE Sumbul, F Sadi, JC Hoe, L Pileggi, F Franchetti
3D Systems Integration Conference (3DIC), 2013 IEEE International, 1-7, 2013
1472013
3D-stacked memory-side acceleration: Accelerator and system design
Q Guo, N Alachiotis, B Akin, F Sadi, G Xu, TM Low, L Pileggi, JC Hoe, ...
2nd Workshop on Near Data Processing, WONDP 2014, 2014
129*2014
An evaluation of edge tpu accelerators for convolutional neural networks
A Yazdanbakhsh, K Seshadri, B Akin, J Laudon, R Narayanaswami
arXiv preprint arXiv:2102.10423 1 (6), 2021
125*2021
Accelerator-aware neural network design using automl
S Gupta, B Akin
arXiv preprint arXiv:2003.02838, 2020
812020
Google neural network models for edge devices: Analyzing and mitigating machine learning inference bottlenecks
A Boroumand, S Ghose, B Akin, R Narayanaswami, GF Oliveira, X Ma, ...
2021 30th International Conference on Parallel Architectures and Compilation …, 2021
802021
Memory bandwidth efficient two-dimensional fast Fourier transform algorithm and implementation for large problem sizes
B Akin, PA Milder, F Franchetti, JC Hoe
2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012
342012
Mitigating edge machine learning inference bottlenecks: An empirical study on accelerating google edge models
A Boroumand, S Ghose, B Akin, R Narayanaswami, GF Oliveira, X Ma, ...
arXiv preprint arXiv:2103.00768, 2021
302021
Rethinking co-design of neural architectures and hardware accelerators
Y Zhou, X Dong, B Akin, M Tan, D Peng, T Meng, A Yazdanbakhsh, ...
arXiv preprint arXiv:2102.08619, 2021
292021
Understanding the design space of dram-optimized hardware FFT accelerators
B Akin, F Franchetti, JC Hoe
Application-specific Systems, Architectures and Processors (ASAP), 2014 IEEE …, 2014
282014
Hamlet: Hardware accelerated memory layout transform within 3d-stacked dram
B Akın, JC Hoe, F Franchetti
High Performance Extreme Computing Conference (HPEC), 2014 IEEE, 0
27*
Discovering multi-hardware mobile models via architecture search
G Chu, O Arikan, G Bender, W Wang, A Brighton, PJ Kindermans, H Liu, ...
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern …, 2021
262021
Zcomp: Reducing dnn cross-layer memory footprint using vector extensions
B Akin, ZA Chishti, AR Alameldeen
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
252019
Apollo: Transferable architecture exploration
A Yazdanbakhsh, C Angermueller, B Akin, Y Zhou, A Jones, M Hashemi, ...
arXiv preprint arXiv:2102.01723, 2021
242021
Hamlet architecture for parallel data reorganization in memory
B Akin, F Franchetti, JC Hoe
IEEE Micro 36 (1), 14-23, 2015
172015
FFTs with near-optimal memory access through block data layouts
B Akin, F Franchetti, JC Hoe
Acoustics, Speech and Signal Processing (ICASSP), 2014 IEEE International …, 2014
162014
Towards the co-design of neural networks and accelerators
Y Zhou, X Dong, T Meng, M Tan, B Akin, D Peng, A Yazdanbakhsh, ...
Proceedings of Machine Learning and Systems 4, 141-152, 2022
152022
Memory system characterization of deep learning workloads
Z Chishti, B Akin
Proceedings of the International Symposium on Memory Systems, 497-505, 2019
122019
FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation
B Akin, F Franchetti, JC Hoe
Journal of Signal Processing Systems, 1-16, 2015
122015
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