Power yield analysis under process and temperature variations K Haghdad, M Anis IEEE transactions on very large scale integration (VLSI) systems 20 (10 …, 2011 | 21 | 2011 |
Design-specific optimization considering supply and threshold voltage variations K Haghdad, M Anis IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 15 | 2008 |
Floorplanning for low power IC design considering temperature variations K Haghdad, M Anis, Y Ismail Microelectronics journal 42 (1), 89-95, 2011 | 10 | 2011 |
Power supply pads assignment for maximum timing yield K Haghdad, M Anis IEEE Transactions on Circuits and Systems II: Express Briefs 58 (10), 697-701, 2011 | 6 | 2011 |
Timing yield analysis considering process-induced temperature and supply voltage variations K Haghdad, M Anis Microelectronics Journal 43 (12), 956-961, 2012 | 2 | 2012 |
Power grid analysis and verification considering temperature variations K Haghdad, J Jaffari, M Anis Microelectronics Journal 43 (3), 189-197, 2012 | 2 | 2012 |
Parametric Yield of VLSI Systems under Variability: Analysis and Design Solutions K Haghdad University of Waterloo, 2011 | 1 | 2011 |
Scaling analysis of yield optimization considering supply and threshold voltage variations K Haghdad, M Anis Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 1 | 2010 |
Design-specific supply and threshold voltage optimization in nanometer era K Haghdad, M Anis 2007 50th Midwest Symposium on Circuits and Systems, 1054-1057, 2007 | | 2007 |