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Wolfgang Ecker
Wolfgang Ecker
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Cited by
Cited by
Year
Hardware-dependent software
W Ecker, W Müller, R Dömer
Hardware-dependent Software, 1-13, 2009
982009
Industrial IP integration flows based on IP-XACT standards
W Kruijtzer, P Van Der Wolf, E De Kock, J Stuyt, W Ecker, A Mayer, ...
2008 Design, Automation and Test in Europe, 32-37, 2008
752008
Implementation of a transaction level assertion framework in SystemC
W Ecker, V Esen, T Steininger, M Velten, M Hull
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
712007
Safety evaluation of automotive electronics using virtual prototypes: State of the art and research challenges
JH Oetjens, N Bannow, M Becker, O Bringmann, A Burger, M Chaari, ...
2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2014
682014
The next generation of virtual prototyping: Ultra-fast yet accurate simulation of HW/SW systems
O Bringmann, W Ecker, A Gerstlauer, A Goyal, D Mueller-Gritschneder, ...
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
582015
Hardware/software co-simulation in a VHDL-based test bench approach
M Bauer, W Ecker
Proceedings of the 34th annual Design Automation Conference, 774-779, 1997
421997
The design cube-a model for vhdl designflow representation
W Ecker, M Hofmeister
Proceedings EURO-DAC'92: European Design Automation Conference, 752-757, 1992
401992
Using VHDL for HW/SW co-specification
W Ecker
Proceedings of EURO-DAC 93 and EURO-VHDL 93-European Design Automation …, 1993
381993
Requirements and concepts for transaction level assertions
W Ecker, V Esen, T Steininger, M Velten, M Hull
2006 International Conference on Computer Design, 286-293, 2006
362006
The system verification methodology for advanced TLM verification
MFS Oliveira, C Kuznik, HM Le, D Große, F Haedicke, W Mueller, ...
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2012
322012
Specification language for transaction level assertions
W Ecker, V Esen, T Steininger, M Velten, M Hull
2006 IEEE International High Level Design Validation and Test Workshop, 77-84, 2006
302006
Re-use-centric architecture for a fully accelerated testbench environment
R Henftling, A Zinn, M Bauer, M Zambaldi, W Ecker
Proceedings 2003. Design Automation Conference (IEEE Cat. No. 03CH37451 …, 2003
292003
Execution semantics and formalisms for multi-abstraction TLM assertions
W Ecker, V Esen, M Hull
Fourth ACM and IEEE International Conference on Formal Methods and Models …, 2006
272006
The metamodeling approach to system level synthesis
W Ecker, M Velten, L Zafari, A Goyal
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2014
252014
An object-oriented view of structural VHDL description
W Ecker
Proceedings of VHDL International Users Forum Spring’96 Conference, 255-264, 1996
241996
The semantic of the power intent format UPF: Consistent power modeling from system level to implementation
J Karmann, W Ecker
2013 23rd international workshop on power and timing modeling, optimization …, 2013
232013
TLM+ modeling of embedded HW/SW systems
W Ecker, V Esen, R Schwencker, T Steininger, M Velten
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
222010
Impact of description language, abstraction layer, and value representation on simulation performance
W Ecker, V Esen, L Schonberg, T Steininger, M Velten, M Hull
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
222007
Fault search method and apparatus
R Henftling, W Ecker, A Zinn, M Bauer, M Zambaldi
US Patent App. 10/162,358, 2003
212003
Protocol merging: a VHDL-based method for clock cycle minimizing and protocol preserving scheduling of IO-operations.
W Ecker, M Glesner, A Vombach
European Design Automation Conference: Proceedings of the conference on …, 1994
201994
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