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Moritz Fieback
Moritz Fieback
Bestätigte E-Mail-Adresse bei tudelft.nl
Titel
Zitiert von
Zitiert von
Jahr
Device-Aware Test: A New test Approach Towards DPPB Level
M Fieback, L Wu, GC Medeiros, H Aziza, S Rao, EJ Marinissen, M Taouil, ...
2019 IEEE International Test Conference (ITC), 1-10, 2019
292019
Testing Resistive Memories: Where are We and What is Missing?
M Fieback, M Taouil, S Hamdioui
2018 IEEE International Test Conference (ITC), 1-9, 2018
162018
Defect and fault modeling framework for STT-MRAM testing
L Wu, S Rao, M Taouil, GC Medeiros, M Fieback, EJ Marinissen, GS Kar, ...
IEEE Transactions on Emerging Topics in Computing 9 (2), 707-723, 2019
122019
DFT Scheme for Hard-to-Detect Faults in FinFET SRAMs
GC Medeiros, M Taouil, M Fieback, LB Poehls, S Hamdioui
2019 IEEE European Test Symposium (ETS), 1-2, 2019
112019
Testing Computation-in-Memory Architectures Based on Emerging Memories
S Hamdioui, M Fieback, S Nagarajan, M Taouil
2019 IEEE International Test Conference (ITC), 1-10, 2019
92019
Hard-to-detect fault analysis in finfet srams
GC Medeiros, M Fieback, L Wu, M Taouil, LMB Poehls, S Hamdioui
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021
82021
Testing Scouting Logic-Based Computation-in-Memory Architectures
M Fieback, S Nagarajan, R Bishnoi, M Tahoori, M Taouil, S Hamdioui
2020 IEEE European Test Symposium (ETS), 1-6, 2020
72020
Special Session–Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield Analysis
R Bishnoi, L Wu, M Fieback, C Münch, SM Nair, M Tahoori, Y Wang, H Li, ...
2020 IEEE 38th VLSI Test Symposium (VTS), 1-10, 2020
72020
Intermittent Undefined State Fault in RRAMs
M Fieback, GC Medeiros, A Gebregiorgis, H Aziza, M Taouil, S Hamdioui
2021 IEEE European Test Symposium (ETS), 1-6, 2021
62021
A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs
GC Medeiros, CC Gürsoy, L Wu, M Fieback, M Jenihhin, M Taouil, ...
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 792-797, 2020
52020
Rebooting Computing: The Challenges for Test and Reliability
A Bosio, I O'Connor, GS Rodrigues, FK Lima, EI Vatajelu, G Di Natale, ...
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2019
52019
Detecting random read faults to reduce test escapes in FinFET SRAMs
GC Medeiros, M Fieback, A Gebregiorgis, M Taouil, LB Poehls, ...
2021 IEEE European Test Symposium (ETS), 1-6, 2021
42021
An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs)
H Aziza, M Moreau, M Fieback, M Taouil, S Hamdioui
IEEE Access 8, 137263-137274, 2020
42020
Review of Manufacturing Process Defects and Their Effects on Memristive Devices
LM Poehls, MCR Fieback, S Hoffmann-Eifert, T Copetti, E Brum, S Menzel, ...
Journal of electronic testing 37 (4), 427-437, 2021
32021
Device-Aware Test for Emerging Memories: Enabling Your Test Program for DPPB Level
L Wu, M Fieback, M Taouil, S Hamdioui
2020 IEEE European Test Symposium (ETS), 1-2, 2020
32020
DRAM Reliability: Aging Analysis and Reliability Prediction Model
M Fieback
32017
Defects, Fault Modeling, and Test Development Framework for RRAMs
M Fieback, GC Medeiros, L Wu, H Aziza, R Bishnoi, M Taouil, S Hamdioui
ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (3), 1-26, 2022
12022
Evaluating the Impact of Process Variation on RRAMs
E Brum, M Fieback, TS Copetti, H Jiayi, S Hamdioui, F Vargas, ...
2021 IEEE 22nd Latin American Test Symposium (LATS), 1-6, 2021
12021
Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation
H Aziza, S Hamdioui, M Fieback, M Taouil, M Moreau
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
12021
Multi-level control of resistive ram (Rram) using a write termination to achieve 4 bits/cell in high resistance state
H Aziza, S Hamdioui, M Fieback, M Taouil, M Moreau, P Girard, A Virazel, ...
Electronics 10 (18), 2222, 2021
12021
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