| The M5 simulator: Modeling networked systems NL Binkert, RG Dreslinski, LR Hsu, KT Lim, AG Saidi, SK Reinhardt IEEE Micro 26 (4), 52-60, 2006 | 1143 | 2006 |
| Near-threshold computing: Reclaiming moore's law through energy efficient integrated circuits RG Dreslinski, M Wieckowski, D Blaauw, D Sylvester, T Mudge Proceedings of the IEEE 98 (2), 253-266, 2010 | 1088 | 2010 |
| A survey of multicore processors G Blake, RG Dreslinski, T Mudge IEEE Signal Processing Magazine 26 (6), 26-37, 2009 | 440 | 2009 |
| Sirius: An open end-to-end voice and vision personal assistant and its implications for future warehouse scale computers J Hauswald, MA Laurenzano, Y Zhang, C Li, A Rovinski, A Khurana, ... Proceedings of the Twentieth International Conference on Architectural …, 2015 | 311 | 2015 |
| PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor T Kgil, S D'Souza, A Saidi, N Binkert, R Dreslinski, T Mudge, S Reinhardt, ... ACM SIGPLAN Notices 41 (11), 117-128, 2006 | 274 | 2006 |
| Full-system analysis and characterization of interactive smartphone applications A Gutierrez, RG Dreslinski, TF Wenisch, T Mudge, A Saidi, C Emmons, ... 2011 IEEE International Symposium on Workload Characterization (IISWC), 81-90, 2011 | 243 | 2011 |
| Composite Cores: Pushing Heterogeneity into a Core A Lukefahr, S Padmanabha, R Das, F Sleiman, R Dreslinski, T Wenisch, ... Proc. of the 45th Annual International Symposium on Microarchitecture, 2012 | 211 | 2012 |
| Catnap: Energy proportional multiple network-on-chip R Das, S Narayanasamy, SK Satpathy, RG Dreslinski Proceedings of the 40th annual international symposium on Computer …, 2013 | 192 | 2013 |
| OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator S Pal, J Beaumont, DH Park, A Amarnath, S Feng, C Chakrabarti, HS Kim, ... High Performance Computer Architecture (HPCA), 2018 IEEE International …, 2018 | 189 | 2018 |
| DjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers J Hauswald, Y Kang, MA Laurenzano, Q Chen, C Li, T Mudge, ... Proceedings of the 42nd Annual International Symposium on Computer …, 2015 | 189 | 2015 |
| Sources of error in full-system simulation A Gutierrez, J Pusdesris, RG Dreslinski, T Mudge, C Sudanthi, ... 2014 IEEE International Symposium on Performance Analysis of Systems and …, 2014 | 151 | 2014 |
| Evolution of thread-level parallelism in desktop applications G Blake, RG Dreslinski, T Mudge, K Flautner International Symposium on Computer Architecture (ISCA), 2010 | 137 | 2010 |
| Energy efficient near-threshold chip multi-processing B Zhai, RG Dreslinski, D Blaauw, T Mudge, D Sylvester Proceedings of the 2007 international symposium on Low power electronics and …, 2007 | 135 | 2007 |
| Adrenaline: Pinpointing and reigning in tail queries with quick voltage boosting CH Hsu, Y Zhang, MA Laurenzano, D Meisner, T Wenisch, J Mars, L Tang, ... Proceedings of the 2015 IEEE 21st International Symposium on High …, 2015 | 133 | 2015 |
| Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores D Fick, RG Dreslinski, B Giridhar, G Kim, S Seo, M Fojtik, S Satpathy, ... 2012 IEEE International Solid-State Circuits Conference, 190-192, 2012 | 118 | 2012 |
| 14.7 a 288µw programmable deep-learning processor with 270kb on-chip weight storage using non-uniform memory hierarchy for mobile intelligence S Bang, J Wang, Z Li, C Gao, Y Kim, Q Dong, YP Chen, L Fick, X Sun, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 250-251, 2017 | 117 | 2017 |
| The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips S Davidson, S Xie, C Torng, K Al-Hawai, A Rovinski, T Ajayi, L Vega, ... IEEE Micro 38 (2), 30-41, 2018 | 106 | 2018 |
| Swizzle-Switch Networks for Many-Core Systems K Sewell, RG Dreslinski, T Manville, S Satpathy, N Pinckney, G Blake, ... | 100 | 2012 |
| Exploring DRAM organizations for energy-efficient and resilient exascale memories B Giridhar, M Cieslak, D Duggal, R Dreslinski, HM Chen, R Patti, B Hold, ... Proceedings of SC13: International Conference for High Performance Computing …, 2013 | 86 | 2013 |
| CONTENTION MANAGEMENT FOR A HARDWARE TRANSACTIONAL MEMORY G Blake, TN Mudge, NYS Chong, RG Dreslinski, SD Biles, E Özer US Patent 20,150,154,045, 2015 | 82* | 2015 |
Trevor MudgeBredt Family Professor of Engineering, University of MichiganVerified email at eecs.umich.edu
