sohan purohit
sohan purohit
Unknown affiliation
Verified email at intel.com
Title
Cited by
Cited by
Year
Investigating the impact of logic and circuit implementation on full adder performance
S Purohit, M Margala
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (7á…, 2011
482011
MORA-an architecture and programming model for a resource efficient coarse grained reconfigurable processor
SR Chalamalasetti, S Purohit, M Margala, W Vanderbauwhede
2009 NASA/ESA Conference on Adaptive Hardware and Systems, 389-396, 2009
452009
A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model
SR Chalamalasetti, W Vanderbauwhede, S Purohit, M Margala
2009 International Conference on Field Programmable Logic and Applicationsá…, 2009
182009
New performance/power/area efficient, reliable full adder design
S Purohit, M Margala, M Lanuzza, P Corsonello
Proceedings of the 19th ACM Great Lakes symposium on VLSI, 493-498, 2009
172009
Design-space exploration of energy-delay-area efficient coarse-grain reconfigurable datapath
S Purohit, M Lanuzza, S Perri, P Corsonello, M Margala
2009 22nd International Conference on VLSI Design, 45-50, 2009
152009
Design and evaluation of high-performance processing elements for reconfigurable systems
SS Purohit, SR Chalamalasetti, M Margala, WA Vanderbauwhede
IEEE transactions on very large scale integration (VLSI) systems 21 (10á…, 2012
142012
Exploring digital logic design using ballistic deflection transistors through Monte Carlo simulations
I ═˝iguez-de-La-Torre, S Purohit, V Kaushal, M Margala, M Gong, ...
IEEE Transactions on Nanotechnology 10 (6), 1337-1346, 2011
142011
Power-efficient high throughput reconfigurable datapath design for portable multimedia devices
S Purohit, SR Chalamalasetti, M Margala, P Corsonello
2008 International Conference on Reconfigurable Computing and FPGAs, 217-222, 2008
132008
A C++-embedded Domain-Specific Language for programming the MORA soft processor array
W Vanderbauwhede, M Margala, SR Chalamalasetti, S Purohit
ASAP 2010-21st IEEE International Conference on Application-specific Systemsá…, 2010
122010
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor.
W Vanderbauwhede, M Margala, SR Chalamalasetti, S Purohit
ERSA, 195-201, 2009
112009
Design space exploration of split-path data driven dynamic full adder
S Purohit, M Lanuzza, M Margala
Journal of Low Power Electronics 6 (4), 469-481, 2010
92010
Design and evaluation of an energy-delay-area efficient datapath for coarse-grain reconfigurable computing systems
S Purohit, M Lanuzza, S Perri, P Corsonello, M Margala
Journal of Low Power Electronics 5 (3), 326-338, 2009
92009
A few lines of code, thousands of cores: High-level FPGA programming using vector processor networks
W Vanderbauwhede, SR Chalamalasetti, S Purohit, M Margala
2011 International Conference on High Performance Computing & Simulationá…, 2011
72011
Throughput/resource-efficient reconfigurable processor for multimedia applications
S Purohit, SR Chalamalasetti, M Margala, W Vanderbauwhede
IEEE transactions on very large scale integration (VLSI) systems 21 (7á…, 2012
62012
Performance and area efficient transpose memory architecture for high throughput adaptive signal processing systems
M El-Hadedy, S Purohit, M Margala, SJ Knapskog
2010 NASA/ESA Conference on Adaptive Hardware and Systems, 113-120, 2010
62010
Data driven DCVSL: A clockless approach to dynamic differential circuit design
S Purohit, M Margala
2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 640-643, 2010
52010
An area efficient design methodology for SEU tolerant digital circuits
S Purohit, D Harrington, M Margala
Proceedings of 2010 IEEE International Symposium on Circuits and Systemsá…, 2010
52010
Low latency transpose memory for high throughput signal processing
M El-Hadedy, S Purohit, M Margala, SJ Knapskog
Proceedings of the 8th IEEE International NEWCAS Conference 2010, 373-376, 2010
42010
Low overhead soft error detection and correction scheme for reconfigurable pipelined data paths
S Purohit, SR Chalamalasetti, M Margala
2010 NASA/ESA Conference on Adaptive Hardware and Systems, 59-65, 2010
42010
Radiation-Hardened Reconfigurable Array With Instruction Roll-Back
SR Chalamalasetti, S Purohit, M Margala, W Vanderbauwhede
IEEE Embedded Systems Letters 2 (4), 123-126, 2010
32010
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