Chun-Yi Lee
Titel
Zitiert von
Zitiert von
Jahr
FinCANON: A PVT-aware integrated delay and power modeling framework for FinFET-based caches and on-chip networks
CY Lee, NK Jha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (5 …, 2013
322013
FinFET-based dynamic power management of on-chip interconnection networks through adaptive back-gate biasing
CY Lee, NK Jha
2009 IEEE International Conference on Computer Design, 350-357, 2009
262009
A deep policy inference Q-network for multi-agent systems
ZW Hong, SY Su, TY Shann, YH Chang, CY Lee
Proceedings of the 17th International Conference on Autonomous Agents and …, 2018
252018
Virtual-to-real: Learning to control in visual semantic segmentation
ZW Hong, C Yu-Ming, SY Su, TY Shann, YH Chang, HK Yang, BHL Ho, ...
International Joint Conferences on Artificial Intelligence (IJCAI), arXiv …, 2018
252018
Dynamic video segmentation network
YS Xu, TJ Fu, HK Yang, CY Lee
Proceedings of the IEEE Conference on Computer Vision and Pattern …, 2018
252018
CACTI-FinFET: An integrated delay and power modeling framework for FinFET-based caches under process variations
CY Lee, NK Jha
2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC), 866-871, 2011
232011
McPAT-PVT: Delay and power modeling framework for FinFET processor architectures under PVT variations
A Tang, Y Yang, CY Lee, NK Jha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (9 …, 2014
222014
Variable-pipeline-stage router
CY Lee, NK Jha
IEEE transactions on very large scale integration (VLSI) systems 21 (9 …, 2012
142012
Diversity-driven exploration strategy for deep reinforcement learning
ZW Hong, TY Shann, SY Su, YH Chang, TJ Fu, CY Lee
Advances in Neural Information Processing Systems (NeurIPS), 10489-10500, 2018
132018
A dynamic deep neural network design for efficient workload allocation in edge computing
C Lo, YY Su, CY Lee, SC Chang
2017 IEEE International Conference on Computer Design (ICCD), 273-280, 2017
92017
FinFET-based power simulator for interconnection networks
CY Lee, NK Jha
ACM Journal on Emerging Technologies in Computing Systems (JETC) 6 (1), 1-18, 2008
92008
Segment weighted random BIST (SWR-BIST): a low power BIST technique
CY Lee, CM Li
2005 IEEE Asian Solid-State Circuits Conference, 333-336, 2005
62005
Never forget: Balancing exploration and exploitation via learning optical flow
HK Yang, PH Chiang, KW Ho, MF Hong, CY Lee
arXiv preprint arXiv:1901.08486, 2019
32019
Visual relationship prediction via label clustering and incorporation of depth information
HK Yang, AC Cheng, KW Ho, TJ Fu, CY Lee
Proceedings of the European Conference on Computer Vision (ECCV), 0-0, 2018
32018
A Distributed Scheme for Accelerating Semantic Video Segmentation on An Embedded Cluster
HK Yang, TJ Fu, PH Chiang, KW Ho, CY Lee
International Conference on Computer Design, 2019
12019
Adversarial Active Exploration for Inverse Dynamics Model Learning
ZW Hong, TJ Fu, TY Shann, YH Chang, CY Lee
Conference on Robot Learning, 2019
12019
Exploration via Flow-Based Intrinsic Rewards
HK Yang, PH Chiang, MF Hong, CY Lee
12019
Design and Chip Implementation of the Segment Weighted Random BIST for Low Power Testing
CY Lee, JCM Li
Journal of Low Power Electronics 3 (2), 206-216, 2007
12007
Flow-based Intrinsic Curiosity Module
HK Yang, PH Chiang, MF Hong, CY Lee
International Joint Conference on Artificial Intelligence, 2020
2020
Construction of Macro Actions for Deep Reinforcement Learning
YH Chang, KY Chang, H Kuo, CY Lee
arXiv preprint arXiv:1908.01478, 2019
2019
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