| FPGA based high performance double-precision matrix multiplication VBY Kumar, S Joshi, SB Patkar, H Narayanan International journal of parallel programming 38, 322-338, 2010 | 82 | 2010 |
| Approximation algorithms for min-k-overlap problems using the principal lattice of partitions approach H Narayanan, S Roy, S Patkar Journal of Algorithms 21 (2), 306-330, 1996 | 28 | 1996 |
| Realization of set functions as cut functions of graphs and hypergraphs S Fujishige, SB Patkar Discrete Mathematics 226 (1-3), 199-210, 2001 | 25 | 2001 |
| An efficient practical heuristic for good ratio-cut partitioning SB Patkar, H Narayanan 16th International Conference on VLSI Design, 2003. Proceedings., 64-69, 2003 | 21 | 2003 |
| Solution of Partial Differential Equations by electrical analogy YD Save, H Narayanan, SB Patkar Journal of Computational Science 2 (1), 18-30, 2011 | 20 | 2011 |
| Acceleration of conjugate gradient method for circuit simulation using CUDA A Maringanti, V Athavale, SB Patkar 2009 International Conference on High Performance Computing (HiPC), 438-444, 2009 | 19 | 2009 |
| Improving graph partitions using submodular functions SB Patkar, H Narayanan Discrete Applied Mathematics 131 (2), 535-553, 2003 | 18 | 2003 |
| CLARINET: A RISC-V based framework for posit arithmetic empiricism R Jain, N Sharma, F Merchant, S Patkar, R Leupers arXiv e-prints, arXiv: 2006.00364, 2020 | 16 | 2020 |
| FPGA implementation of particle filter based object tracking in video S Agrawal, P Engineer, R Velmurugan, S Patkar 2012 International Symposium on Electronic System Design (ISED), 82-86, 2012 | 12 | 2012 |
| A Remote lab for real-time digital signal processing S Shelke, M Date, S Patkar, R Velmurugan, P Rao 2012 5th European DSP Education and Research Conference (EDERC), 266-270, 2012 | 12 | 2012 |
| Efficient network flow based ratio-cut netlist hypergraph partitioning. SB Patkar, H Sharma, H Narayanan WSEAS Transactions on Circuits and Systems 3 (1), 47-53, 2004 | 12 | 2004 |
| The realization of finite state machines by decomposition and the principal lattice of partitions of a submodular function MP Desai, H Narayanan, SB Patkar Discrete Applied Mathematics 131 (2), 299-310, 2003 | 12 | 2003 |
| Remote triggered fpga based automated system JST Jethra, SB Patkar, S Datta 2014 11th International Conference on Remote Engineering and Virtual …, 2014 | 10 | 2014 |
| Principal lattice of partitions of submodular functions on graphs: fast algorithms for principal partition and generic rigidity S Patkar, H Narayanan Algorithms and Computation: Third International Symposium, ISAAC'92 Nagoya …, 1992 | 9 | 1992 |
| FPGA accelerator for real-time emulation of power electronic systems using multiport decomposition MK Namboothiripad, MJ Datar, MC Chandorkar, SB Patkar IEEE Transactions on Industry Applications 56 (6), 6674-6686, 2020 | 8 | 2020 |
| CLARINET: A quire-enabled RISC-V-based framework for posit arithmetic empiricism NN Sharma, R Jain, MM Pokkuluri, SB Patkar, R Leupers, RS Nikhil, ... Journal of Systems Architecture 135, 102801, 2023 | 7 | 2023 |
| CLARINET: a RISC-V based framework for posit arithmetic empiricism N Sharma, R Jain, M Mohan, S Patkar, R Leupers, N Rishiyur, F Merchant arXiv preprint arXiv:2006.00364, 2020 | 7 | 2020 |
| e-Prayog: A new paradigm for electronics laboratories M Date, S Patkar, M Patil, N Narendra, S Shelke, A Kamath, D Ghosh 2012 IEEE International Conference on Technology Enhanced Education (ICTEE …, 2012 | 7 | 2012 |
| Single storage semi-global matching for real time depth processing P Sawant, Y Temburu, M Datar, I Ahmed, V Shriniwas, S Patkar Computer Vision, Pattern Recognition, Image Processing, and Graphics: 7th …, 2020 | 6 | 2020 |
| Framework for application mapping over packet-switched network of fpgas: Case studies VBY Kumar, P Engineer, M Datar, Y Turakhia, S Agarwal, S Diwale, ... arXiv preprint arXiv:1508.06823, 2015 | 6 | 2015 |
