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Xiaowei Ren
Xiaowei Ren
Senior Deep Learning Architect, NVIDIA
Verified email at nvidia.com - Homepage
Title
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Cited by
Year
Procrustes: a dataflow and accelerator for sparse deep neural network training
D Yang, A Ghasemazar, X Ren, M Golub, G Lemieux, M Lis
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
302020
Fault-tolerant routing for on-chip network without using virtual channels
P Ren, Q Meng, X Ren, N Zheng
The 51st Annual ACM/IEEE Design Automation Conference (DAC'51), 2014
292014
Hmg: Extending cache coherence protocols across modern hierarchical multi-gpu systems
X Ren, D Lustig, E Bolotin, A Jaleel, O Villa, D Nellans
2020 IEEE International Symposium on High Performance Computer Architecture …, 2020
232020
Efficient Sequential Consistency in GPUs via Relativistic Cache Coherence
X Ren, L Mieszko
High Performance Computer Architecture (HPCA), 2017
202017
A deadlock-free and connectivity-guaranteed methodology for achieving fault-tolerance in on-chip networks
P Ren, X Ren, S Sane, M Kinsy, N Zheng
IEEE Transactions on Computers, 2016
202016
Hardware implementation of KLMS algorithm using FPGA
X Ren, P Ren, B Chen, T Min, N Zheng
International Joint Conference on Neural Networks (IJCNN), 2014
92014
High-performance GPU transactional memory via eager conflict detection
X Ren, M Lis
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
62018
CHOPIN: Scalable Graphics Rendering in Multi-GPU Systems via Parallel Image Composition
X Ren, M Lis
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
42021
Dynamic Partial Order Reductions for Spinloops
M Kokologiannakis, X Ren, V Vafeiadis
2021 Formal Methods in Computer Aided Design (FMCAD), 163-172, 2021
32021
A real-time permutation entropy computation for EEG signals
X Ren, Q Yu, B Chen, N Zheng, P Ren
20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), 2015
32015
Bandwidth-based Application-Aware Multipath Routing for NoCs
XT Ding, CX Yang, XW Ren, PJ Ren
International Conference on Computer Information Systems and Industrial …, 2015
22015
A reconfigurable parallel FPGA accelerator for the kernel affine projection algorithm
X Ren, Q Yu, B Chen, N Zheng, P Ren
IEEE International Conference on Digitial Signal Processing (DSP), 2015
22015
A 128-way FPGA Platform for the Acceleration of KLMS Algorithm
X Ren, Q Yu, B Chen, Z Nanning, P Ren
20th Asia and South Pacific Design Automation Conference, (ASP-DAC), 2015
22015
A Reconfigurable Parallel Acceleration Platform for Evaluation of Permutation Entropy
X Ren, P Ren, B Chen, JC Principe, N Zheng
36th Annual International Conference of the IEEE Engineering in Medicine and …, 2014
22014
IDFT: An Intermediate Node Based Deterministic Fault Tolerant Routing in 2D Mesh
CX Yang, XT Ding, XW Ren, PJ Ren
International Conference on Computer Information Systems and Industrial …, 2015
2015
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