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Nishil Talati
Nishil Talati
Research Faculty, CSE, University of Michigan
Bestätigte E-Mail-Adresse bei umich.edu - Startseite
Titel
Zitiert von
Zitiert von
Jahr
Logic design within memristive memories using memristor-aided loGIC (MAGIC)
N Talati, S Gupta, P Mane, S Kvatinsky
IEEE Transactions on Nanotechnology 15 (4), 635-650, 2016
3332016
SIMPLE MAGIC: Synthesis and in-memory mapping of logic execution for memristor-aided logic
RB Hur, N Wald, N Talati, S Kvatinsky
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 225-232, 2017
812017
Memristive logic: A framework for evaluation and comparison
J Reuben, R Ben-Hur, N Wald, N Talati, AH Ali, PE Gaillardon, ...
2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017
812017
Prodigy: Improving the memory latency of data-indirect irregular workloads using hardware-software co-design
N Talati, K May, A Behroozi, Y Yang, K Kaszyk, C Vasiladiotis, T Verma, ...
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
562021
mmpu—a real processing-in-memory architecture to combat the von neumann bottleneck
N Talati, R Ben-Hur, N Wald, A Haj-Ali, J Reuben, S Kvatinsky
Applications of Emerging Memory Technology: Beyond Storage, 191-213, 2020
452020
Practical challenges in delivering the promises of real processing-in-memory machines
N Talati, AH Ali, RB Hur, N Wald, R Ronen, PE Gaillardon, S Kvatinsky
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
282018
CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM
N Talati, H Ha, B Perach, R Ronen, S Kvatinsky
IEEE Micro 39 (1), 33-43, 2019
182019
Ndminer: accelerating graph pattern mining using near data processing
N Talati, H Ye, Y Yang, L Belayneh, KY Chen, D Blaauw, T Mudge, ...
Proceedings of the 49th Annual International Symposium on Computer …, 2022
162022
A taxonomy and evaluation framework for memristive logic
J Reuben, N Talati, N Wald, R Ben-Hur, AH Ali, PE Gaillardon, ...
Handbook of Memristor Networks, 1065-1099, 2019
112019
Stateful-NOR based reconfigurable architecture for logic implementation
P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha
Microelectronics Journal 46 (6), 551-562, 2015
112015
Implementation of NOR logic based on material implication on CMOL FPGA architecture
P Mane, N Talati, A Riswadkar, B Jasani, CK Ramesha
2015 28th International Conference on VLSI Design, 523-528, 2015
92015
A survey describing beyond Si transistors and exploring their implications for future processors
H Kim, A Amarnath, J Bagherzadeh, N Talati, RG Dreslinski
ACM Journal on Emerging Technologies in Computing Systems (JETC) 17 (3), 1-44, 2021
82021
Practical challenges in delivering the promises of real processing-in-memory machines. In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)
N Talati, AH Ali, RB Hur, N Wald, R Ronen, PE Gaillardon, S Kvatinsky
IEEE, 2018
82018
A deep dive into understanding the random walk-based temporal graph learning
N Talati, D Jin, H Ye, A Brahmakshatriya, G Dasika, S Amarasinghe, ...
2021 IEEE International Symposium on Workload Characterization (IISWC), 87-100, 2021
72021
Algorithmic considerations in memristive memory processing units (MPU)
RB Hur, N Talati, S Kvatinsky
CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and …, 2016
72016
Mint: An accelerator for mining temporal motifs
N Talati, H Ye, S Vedula, KY Chen, Y Chen, D Liu, Y Yuan, D Blaauw, ...
2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2022
62022
PEDAL: A Power Efficient GCN Accelerator with Multiple DAtafLows
Y Chen, A Khadem, X He, N Talati, TA Khan, T Mudge
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023
32023
Rate-compatible and high-throughput architecture designs for encoding LDPC codes
N Talati, Z Wang, S Kvatinsky
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
32017
Reconfiguration on nanocrossbar using material implication
P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha
Sādhanā 42 (1), 33-44, 2017
32017
Locality-aware Optimizations for Improving Remote Memory Latency in Multi-GPU Systems
L Belayneh, H Ye, KY Chen, D Blaauw, T Mudge, R Dreslinski, N Talati
Proceedings of the International Conference on Parallel Architectures and …, 2022
22022
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