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Sushant Mittal
Sushant Mittal
Computational Process, Lam Research
Bestätigte E-Mail-Adresse bei lamresearch.com
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Zitiert von
Zitiert von
Jahr
Analytical estimation of threshold voltage variability by metal gate granularity in FinFET
PH Vardhan, S Mittal, S Ganguly, U Ganguly
IEEE Transactions on Electron Devices 64 (8), 3071-3076, 2017
312017
An Analytical Model to Estimate FinFET’sDistribution Due to Fin-Edge Roughness
S Mittal, AS Shekhawat, U Ganguly
IEEE Transactions on Electron Devices 63 (3), 1352-1358, 2016
162016
Impact of MOL/BEOL air-spacer on parasitic capacitance and circuit performance at 3 nm node
A Pal, S Mittal, EM Bazizi, A Sachid, M Saremi, B Colombeau, G Thareja, ...
2019 International Conference on Simulation of Semiconductor Processes and …, 2019
142019
Epitaxially defined FinFET: Variability resistant and high-performance technology
S Mittal, S Gupta, A Nainani, MC Abraham, K Schuegraf, S Lodha, ...
IEEE Transactions on Electron Devices 61 (8), 2711-2718, 2014
142014
Statistical variability analysis of SRAM cell for emerging transistor technologies
S Kurude, S Mittal, U Ganguly
IEEE Transactions on Electron Devices 63 (9), 3514-3520, 2016
122016
Analytical Model to Estimate FinFET’s , , SS, and Distribution Due to FER
S Mittal, AS Shekhawat, S Ganguly, U Ganguly
IEEE Transactions on Electron Devices 64 (8), 3489-3493, 2017
102017
An Analytical Model to Estimate Distribution of Partially Correlated Fin Edges in FinFETs Due to Fin-Edge Roughness
S Mittal, U Ganguly
IEEE Transactions on Electron Devices 64 (4), 1708-1715, 2017
92017
The First Compact Model to Determine Distribution for DG-FinFET Due to LER
S Mittal, U Ganguly
IEEE Transactions on Electron Devices 65 (11), 4772-4779, 2018
72018
Analytical modeling of metal gate granularity based threshold voltage variability in NWFET
PH Vardhan, S Mittal, S Ganguly, U Ganguly
Solid-State Electronics 147, 26-34, 2018
72018
FinFET scaling rule based on variability considerations
S Mittal, AS Shekhawat, U Ganguly
2015 73rd Annual Device Research Conference (DRC), 127-128, 2015
62015
A FinFET LER VTvariability estimation scheme with 300× efficiency improvement
SN Chinta, S Mittal, P Debashis, U Ganguly
2014 International Conference on Simulation of Semiconductor Processes and …, 2014
62014
Epi defined (ED) FinFET: An alternate device architecture for high mobility Ge channel integration in PMOSFET
S Mittal, S Gupta, A Nainani, MC Abraham, K Schuegraf, S Lodha, ...
2013 IEEE 5th International Nanoelectronics Conference (INEC), 367-370, 2013
52013
Epitaxialy defined (ED) FinFET: to reduce VTvariability and enable multiple VT
S Mittal, S Gupta, A Nainani, MC Abraham, K Schuegraf, S Lodha, ...
70th Device Research Conference, 127-128, 2012
42012
Analytical modeling of metal gate granularity induced Vt variability in NWFETs
PH Vardhan, S Mittal, AS Shekhawat, S Ganguly, U Ganguly
2016 74th Annual Device Research Conference (DRC), 1-2, 2016
32016
A bulk planar SiGe quantum-well based ZRAM with low Vt variability
S Dutta, S Mittal, S Lodha, J Schulze, U Ganguly
2015 IEEE International Memory Workshop (IMW), 1-4, 2015
32015
Epitaxial rare earth oxide (EOx) FinFET: A variability-resistant Ge FinFET architecture with multi VT
S Mittal, S Kurude, S Dutta, P Debashis, S Ganguly, S Lodha, A Laha, ...
72nd Device Research Conference, 97-98, 2014
32014
Highly-Doped Through-Contact Silicon Epi Design at 3 nm node
S Mittal, A Pal, M Saremi, J Ferrell, M Haverty, T Miyashita, N Kim, ...
2019 Device Research Conference (DRC), 55-56, 2019
22019
Selective fin trimming after dummy gate removal as the local fin width scaling approach for N5 and beyond
T Miyashita, S Sun, S Mittal, MS Kim, A Pal, A Sachid, K Pathak, ...
2018 IEEE International Electron Devices Meeting (IEDM), 35.6. 1-35.6. 4, 2018
22018
Fully self-aligned via
R Freed, M Sachan, SS Roy, G Alva, HYD Hwang, U Mitra, EM Bazizi, ...
US Patent 11,437,274, 2022
12022
Via size optimization for optimum circuit performance at 3 nm node
S Mittal, A Pal, M Saremi, EM Bazizi, B Alexander, B Ayyagari
2020 International Conference on Simulation of Semiconductor Processes and …, 2020
12020
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