| Networks on chips: A new SoC paradigm L Benini, G De Micheli computer 35 (1), 70-78, 2002 | 5138 | 2002 |
| A survey of design techniques for system-level dynamic power management L Benini, A Bogliolo, G De Micheli IEEE transactions on very large scale integration (VLSI) systems 8 (3), 299-316, 2000 | 1865 | 2000 |
| NoC synthesis flow for customized domain specific multiprocessor systems-on-chip D Bertozzi, A Jalabert, S Murali, R Tamhankar, S Stergiou, L Benini, ... IEEE transactions on parallel and distributed systems 16 (2), 113-129, 2005 | 741 | 2005 |
| System-level power optimization: techniques and tools L Benini, G Micheli ACM Transactions on Design Automation of Electronic Systems (TODAES) 5 (2 …, 2000 | 669 | 2000 |
| Xpipes: A network-on-chip architecture for gigascale systems-on-chip D Bertozzi, L Benini IEEE circuits and systems magazine 4 (2), 18-31, 2004 | 630 | 2004 |
| Analysis of power consumption on switch fabrics in network routers TT Ye, GD Micheli, L Benini Proceedings of the 39th annual design automation conference, 524-529, 2002 | 614 | 2002 |
| Policy optimization for dynamic power management L Benini, A Bogliolo, GA Paleologo, G De Micheli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 572 | 1999 |
| Dynamic power management: design techniques and CAD tools L Benini, G DeMicheli Springer Science & Business Media, 1997 | 525 | 1997 |
| Networks on chip: A new paradigm for systems on chip design L Benini, G De Micheli Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 492 | 2002 |
| Soft-to-hard vector quantization for end-to-end learning compressible representations E Agustsson, F Mentzer, M Tschannen, L Cavigelli, R Timofte, L Benini, ... Advances in neural information processing systems 30, 2017 | 464 | 2017 |
| Modeling and optimization of a solar energy harvester system for self-powered wireless sensor networks D Dondi, A Bertacchini, D Brunelli, L Larcher, L Benini IEEE Transactions on industrial electronics 55 (7), 2759-2766, 2008 | 454 | 2008 |
| Analysis of error recovery schemes for networks on chips S Murali, T Theocharides, N Vijaykrishnan, MJ Irwin, L Benini, ... IEEE Design & Test of Computers 22 (5), 434-442, 2005 | 431 | 2005 |
| Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems L Benini, G De Micheli, E Macii, D Sciuto, C Silvano Proceedings Great Lakes Symposium on VLSI, 77-82, 1997 | 414 | 1997 |
| Activity recognition from on-body sensors: accuracy-power trade-off by dynamic sensor selection P Zappi, C Lombriser, T Stiefmeier, E Farella, D Roggen, L Benini, ... Wireless Sensor Networks: 5th European Conference, EWSN 2008, Bologna, Italy …, 2008 | 392 | 2008 |
| Design issues and considerations for low-cost 3-D TSV IC technology G Van der Plas, P Limaye, I Loi, A Mercha, H Oprins, C Torregiani, S Thijs, ... IEEE Journal of Solid-State Circuits 46 (1), 293-307, 2010 | 382 | 2010 |
| xpipesCompiler: A tool for instantiating application-specific Networks on Chip A Jalabert, S Murali, L Benini, G De Micheli Design, Automation, and Test in Europe: The Most Influential Papers of 10 …, 2008 | 378 | 2008 |
| Near-threshold RISC-V core with DSP extensions for scalable IoT endpoint devices M Gautschi, PD Schiavone, A Traber, I Loi, A Pullini, D Rossi, E Flamand, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (10 …, 2017 | 367 | 2017 |
| Dynamic power management for non-stationary service requests EY Chung, L Benini, A Bogiolo, G De Micheli Proceedings of the conference on Design, automation and test in Europe, 18-es, 1999 | 367 | 1999 |
| Networks on chips L Benini, G De Micheli, TT Ye Morgan Kaufmann, 2006 | 354 | 2006 |
| Mparm: Exploring the multi-processor soc design space with systemc L Benini, D Bertozzi, A Bogliolo, F Menichelli, M Olivieri Journal of VLSI signal processing systems for signal, image and video …, 2005 | 353 | 2005 |
Giovanni De MicheliEPFL, StanfordVerified email at epfl.ch
