Arun Subramaniyan
Arun Subramaniyan
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Neural cache: Bit-serial in-cache acceleration of deep neural networks
C Eckert, X Wang, J Wang, A Subramaniyan, R Iyer, D Sylvester, ...
2018 ACM/IEEE 45Th annual international symposium on computer architecture …, 2018
Compute caches
S Aga, S Jeloka, A Subramaniyan, S Narayanasamy, D Blaauw, R Das
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
A 28-nm compute SRAM with bit-serial logic/arithmetic operations for programmable in-memory vector computing
J Wang, X Wang, C Eckert, A Subramaniyan, R Das, D Blaauw, ...
IEEE Journal of Solid-State Circuits 55 (1), 76-86, 2019
14.2 A compute SRAM with bit-serial integer/floating-point operations for programmable in-memory vector acceleration
J Wang, X Wang, C Eckert, A Subramaniyan, R Das, D Blaauw, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 224-226, 2019
GenAx: A genome sequencing accelerator
D Fujiki, A Subramaniyan, T Zhang, Y Zeng, R Das, D Blaauw, ...
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
Cache automaton
A Subramaniyan, J Wang, ERM Balasubramanian, D Blaauw, D Sylvester, ...
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
Parallel automata processor
A Subramaniyan, R Das
Proceedings of the 44th Annual International Symposium on Computer …, 2017
ASPEN: A scalable In-SRAM architecture for pushdown automata
K Angstadt, A Subramaniyan, E Sadredini, R Rahimi, K Skadron, ...
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018
Accelerated seeding for genome sequence alignment with enumerated radix trees
A Subramaniyan, J Wadden, K Goliya, N Ozog, X Wu, S Narayanasamy, ...
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
In-/near-memory Computing
D Fujiki, X Wang, A Subramaniyan, R Das
Morgan & Claypool Publishers, 2021
Application-guided power-efficient fault tolerance for H. 264 context adaptive variable length coding
M Shafique, S Rehman, F Kriebel, MUK Khan, B Zatt, A Subramaniyan, ...
IEEE Transactions on Computers 66 (4), 560-574, 2016
Genomicsbench: A benchmark suite for genomics
A Subramaniyan, Y Gu, T Dunn, S Paul, M Vasimuddin, S Misra, ...
2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021
Reliability-aware adaptations for shared last-level caches in multi-cores
F Kriebel, S Rehman, A Subramaniyan, SJB Ahandagbe, M Shafique, ...
ACM Transactions on Embedded Computing Systems (TECS) 15 (4), 1-26, 2016
Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores
A Subramaniyan, S Rehman, M Shafique, A Kumar, J Henkel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 37-42, 2017
R2Cache: Reliability-aware reconfigurable last-level cache architecture for multi-cores
F Kriebel, A Subramaniyan, S Rehman, SJB Ahandagbe, M Shafique, ...
2015 International Conference on Hardware/Software Codesign and System …, 2015
An international virtual hackathon to build tools for the analysis of structural variants within species ranging from coronaviruses to vertebrates
AM Mc Cartney, M Mahmoud, M Jochum, DP Agustinho, B Zorman, ...
F1000Research 10, 2021
A High-Throughput Pruning-Based Pair-Hidden-Markov-Model Hardware Accelerator for Next-Generation DNA Sequencing
X Wu, A Subramaniyan, Z Wang, S Narayanasamy, R Das, D Blaauw
IEEE Solid-State Circuits Letters 4, 31-35, 2020
Accelerating maximal-exact-match seeding with enumerated radix trees
A Subramaniyan, J Wadden, K Goliya, N Ozog, X Wu, S Narayanasamy, ...
BioRxiv, 2020.03. 23.003897, 2020
An adaptive migration–replication scheme (AMR) for shared cache in chip multiprocessors
N Chaturvedi, A Subramaniyan, S Gurunarayanan
The Journal of Supercomputing 71, 3904-3933, 2015
Fuzzy set intersection based paired-end short-read alignment
WJ Bolosky, A Subramaniyan, M Zaharia, R Pandya, T Sittler, D Patterson
bioRxiv, 2021.11. 23.469039, 2021
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