| Neural cache: Bit-serial in-cache acceleration of deep neural networks C Eckert, X Wang, J Wang, A Subramaniyan, R Iyer, D Sylvester, ... 2018 ACM/IEEE 45Th annual international symposium on computer architecture …, 2018 | 223 | 2018 |
| Compute caches S Aga, S Jeloka, A Subramaniyan, S Narayanasamy, D Blaauw, R Das 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 201 | 2017 |
| 14.2 a compute SRAM with bit-serial integer/floating-point operations for programmable in-memory vector acceleration J Wang, X Wang, C Eckert, A Subramaniyan, R Das, D Blaauw, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 224-226, 2019 | 62 | 2019 |
| A 28-nm compute SRAM with bit-serial logic/arithmetic operations for programmable in-memory vector computing J Wang, X Wang, C Eckert, A Subramaniyan, R Das, D Blaauw, ... IEEE Journal of Solid-State Circuits 55 (1), 76-86, 2019 | 54 | 2019 |
| Cache automaton A Subramaniyan, J Wang, ERM Balasubramanian, D Blaauw, D Sylvester, ... Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 54 | 2017 |
| Genax: A genome sequencing accelerator D Fujiki, A Subramaniyan, T Zhang, Y Zeng, R Das, D Blaauw, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 49 | 2018 |
| Parallel automata processor A Subramaniyan, R Das 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture …, 2017 | 39 | 2017 |
| ASPEN: A scalable In-SRAM architecture for pushdown automata K Angstadt, A Subramaniyan, E Sadredini, R Rahimi, K Skadron, ... 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 16 | 2018 |
| Application-guided power-efficient fault tolerance for H. 264 context adaptive variable length coding M Shafique, S Rehman, F Kriebel, MUK Khan, B Zatt, A Subramaniyan, ... IEEE Transactions on Computers 66 (4), 560-574, 2016 | 10 | 2016 |
| Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores A Subramaniyan, S Rehman, M Shafique, A Kumar, J Henkel Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 37-42, 2017 | 8 | 2017 |
| Reliability-aware adaptations for shared last-level caches in multi-cores F Kriebel, S Rehman, A Subramaniyan, SJB Ahandagbe, M Shafique, ... ACM Transactions on Embedded Computing Systems (TECS) 15 (4), 1-26, 2016 | 8 | 2016 |
| R2Cache: Reliability-aware reconfigurable last-level cache architecture for multi-cores F Kriebel, A Subramaniyan, S Rehman, SJB Ahandagbe, M Shafique, ... 2015 International Conference on Hardware/Software Codesign and System …, 2015 | 7 | 2015 |
| An adaptive migration–replication scheme (AMR) for shared cache in chip multiprocessors N Chaturvedi, A Subramaniyan, S Gurunarayanan The Journal of Supercomputing 71 (10), 3904-3933, 2015 | 5 | 2015 |
| Accelerated seeding for genome sequence alignment with enumerated radix trees A Subramaniyan, J Wadden, K Goliya, N Ozog, X Wu, S Narayanasamy, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 4 | 2021 |
| In-/near-memory Computing D Fujiki, X Wang, A Subramaniyan, R Das Synthesis Lectures on Computer Architecture 16 (2), 1-140, 2021 | 3 | 2021 |
| Accelerating maximal-exact-match seeding with enumerated radix trees A Subramaniyan, J Wadden, K Goliya, N Ozog, X Wu, S Narayanasamy, ... bioRxiv, 2020 | 3 | 2020 |
| Cache automaton: Repurposing caches for automata processing A Subramaniyan, J Wang, ERM Balasubramanian, D Blaauw, D Sylvester, ... 2017 26th International Conference on Parallel Architectures and Compilation …, 2017 | 3 | 2017 |
| Rigid body transformations for calibration of prototype fast breeder reactor, steam generator inspection device SJ Winston, J Jose, A Subramaniyan, S Murugan, AK Bhaduri International Conference on Advancements in Automation, Robotics & Sensing …, 2016 | 3 | 2016 |
| A 2.46 M reads/s genome sequencing accelerator using a 625 processing-element array Z Wang, T Zhang, D Fujiki, A Subramaniyan, X Wu, M Yasuda, S Miyoshi, ... 2020 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2020 | 2 | 2020 |
| Selective cache line replication scheme in shared last level cache N Chaturvedi, A Subramaniyan, S Gurunarayanan Procedia Computer Science 46, 1095-1107, 2015 | 2 | 2015 |
Reetuparna DasUniversity of MichiganVerified email at umich.edu
