Stefan Wildermann
Zitiert von
Zitiert von
CAN+: A new backward-compatible Controller Area Network (CAN) protocol with up to 16× higher data rates.
T Ziermann, S Wildermann, J Teich
2009 Design, Automation & Test in Europe Conference & Exhibition, 1088-1093, 2009
DAARM: Design-time application analysis and run-time mapping for predictable execution in many-core systems
A Weichslgartner, D Gangadharan, S Wildermann, M Glaß, J Teich
Proceedings of the 2014 International Conference on Hardware/Software …, 2014
A bus-based SoC architecture for flexible module placement on reconfigurable FPGAs
A Oetken, S Wildermann, J Teich, D Koch
2010 International Conference on Field Programmable Logic and Applications …, 2010
Dynamic decentralized mapping of tree-structured applications on NoC architectures
A Weichslgartner, S Wildermann, J Teich
Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on …, 2011
Towards a multisensor station for automated biodiversity monitoring
JW Wägele, P Bodesheim, SJ Bourlat, J Denzler, M Diepenbroek, ...
Basic and Applied Ecology 59, 105-138, 2022
Symmetry-eliminating design space exploration for hybrid application mapping on many-core architectures
T Schwarzer, A Weichslgartner, M Glaß, S Wildermann, P Brand, J Teich
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
Run time mapping of adaptive applications onto homogeneous NoC-based reconfigurable architectures
S Wildermann, T Ziermann, J Teich
2009 International Conference on Field-Programmable Technology, 514-517, 2009
ActorX10: an actor library for X10
S Roloff, A Pöppl, T Schwarzer, S Wildermann, M Bader, M Glaß, ...
Proceedings of the 6th ACM SIGPLAN Workshop on X10, 24-29, 2016
Multi-objective distributed run-time resource management for many-cores
S Wildermann, M Glaß, J Teich
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
Symbolic design space exploration for multi-mode reconfigurable systems
S Wildermann, F Reimann, D Ziener, J Teich
Proceedings of the seventh IEEE/ACM/IFIP international conference on …, 2011
Design-time/run-time mapping of security-critical applications in heterogeneous mpsocs
A Weichslgartner, S Wildermann, J Götzfried, F Freiling, M Glaß, J Teich
Proceedings of the 19th international workshop on software and compilers for …, 2016
Integration of FPGAs in database management systems: challenges and opportunities
A Becher, L BG, D Broneske, T Drewes, B Gurumurthy, K Meyer-Wegener, ...
Datenbank-Spektrum 18, 145-156, 2018
Hard real-time application mapping reconfiguration for NoC-based many-core systems
B Pourmohseni, S Wildermann, M Glaß, J Teich
Real-Time Systems 55, 433-469, 2019
FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs
J Echavarria, S Wildermann, A Becher, J Teich, D Ziener
2016 International Conference on Field-Programmable Technology (FPT), 213-216, 2016
Invasive Computing for mapping parallel programs to many-core architectures
A Weichslgartner, S Wildermann, M Glaß, J Teich
Springer Singapore, 2018
ReProVide: Towards utilizing heterogeneous partially reconfigurable architectures for near-memory data processing
A Becher, A Herrmann, S Wildermann, J Teich
BTW 2019–Workshopband, 2019
Towards the co-evolution of industrial products and its production systems by combining models from development and hardware/software deployment in cyber-physical systems
B Vogel-Heuser, S Wildermann, J Teich
Production Engineering 11, 687-694, 2017
Language and compilation of parallel programs for*-predictable MPSoC execution using invasive computing
J Teich, M Glaß, S Roloff, W Schröder-Preikschat, G Snelting, ...
2016 IEEE 10th International Symposium on Embedded Multicore/Many-core …, 2016
A LUT-based approximate adder
A Becher, J Echavarria, D Ziener, S Wildermann, J Teich
2016 IEEE 24th Annual International Symposium on Field-Programmable Custom …, 2016
A design-time/run-time application mapping methodology for predictable execution time in MPSoCs
A Weichslgartner, S Wildermann, D Gangadharan, M Glaß, J Teich
ACM Transactions on Embedded Computing Systems (TECS) 17 (5), 1-25, 2018
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