Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM M Zangeneh, A Joshi Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 1815-1828, 2014 | 145 | 2014 |
Detecting hardware trojans using backside optical imaging of embedded watermarks B Zhou, R Adato, M Zangeneh, T Yang, A Uyar, B Goldberg, S Unlu, ... 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2015 | 54 | 2015 |
Performance and energy models for memristor-based 1T1R RRAM cell M Zangeneh, A Joshi Proceedings of the great lakes symposium on VLSI, 9-14, 2012 | 32 | 2012 |
Rapid mapping of digital integrated circuit logic gates via multi-spectral backside imaging R Adato, A Uyar, M Zangeneh, B Zhou, A Joshi, B Goldberg, MS Unlu arXiv preprint arXiv:1605.09306, 2016 | 14 | 2016 |
Designing Tunable Subthreshold Logic Circuits Using Adaptive Feedback Equalization M Zangeneh, A Joshi Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 2015 | 10 | 2015 |
An analytical delay reduction strategy for buffer-inserted global interconnects in VDSM technologies M Zangeneh, N Masoumi 2009 European Conference on Circuit Theory and Design, 470-475, 2009 | 8 | 2009 |
Sub-threshold logic circuit design using feedback equalization M Zangeneh, A Joshi 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 7 | 2014 |
Throughput optimization for interleaved repeater-inserted interconnects in VLSI design M Zangeneh, N Masoumi 2010 3rd International Nanoelectronics Conference (INEC), 1443-1444, 2010 | 5 | 2010 |
A compact current-voltage model for carbon nanotube field effect transistors H Hosseinzadegan, H Aghababa, M Zangeneh, A Afzali-kusha, ... 2008 International Semiconductor Conference 2, 359-362, 2008 | 5 | 2008 |
Dictionary-based sparse representation for resolution improvement in laser voltage imaging of CMOS integrated circuits TB Cilingiroglu, M Zangeneh, A Uyar, WC Karl, J Konrad, A Joshi, ... 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 597-600, 2015 | 4 | 2015 |
Integrated nanoantenna labels for rapid security testing of semiconductor circuits R Adato, A Uyar, M Zangeneh, B Zhou, A Joshi, BB Goldberg, MS Ünlü Frontiers in Optics, FTh1B. 2, 2015 | 2 | 2015 |
Designing Energy-efficient Sub-threshold Logic Circuits using Equalization and Non-volatile Memory Circuits using Memristors M Zangeneh Ph.D. Dissertation, 2015 | 2 | 2015 |
Statistical delay modeling of read operation of SRAMs due to channel length variation H Aghababa, M Zangeneh, A Afzali-Kusha, B Forouzandeh Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 2 | 2010 |
Design of a two-capacitor sample & hold circuit using a two-stage OTA with hybrid cascode compensation M Zangeneh, H Aghababa, B Forouzandeh 2009 European Conference on Circuit Theory and Design, 493-498, 2009 | 1 | 2009 |
MIRIM: Modified Interleaved Repeater Insertion Methodology to Reduce Delay Uncertainty in Global Interconnections N Masoumi, M Zangeneh Journal Of Electrical Systems And Signals 1 (2), 2013 | | 2013 |
Effects of device and peripheral parameters on transconductance of silicon nanowire transistors M Zangeneh, H Aghababa, B Forouzandeh Journal of nanoscience and nanotechnology 11 (12), 10664-10667, 2011 | | 2011 |
Effects of device and peripheral parameters on transconductance of silicon nanowire transistors M Zangeneh, H Aghababa, B Forouzandeh Journal of Nanoscience and Nanotechnology (JNN) 11 (12), 10664-10667, 2011 | | 2011 |
Analysis of Delay and Crosstalk in Interconnects for VDSM Technologies M Zangeneh University of Tehran, 2010 | | 2010 |
Statistical delay metrics for binary RC Tree Interconnects in VDSM technology M Zangeneh, N Masoumi Iranian Conference on Electrical Engineering 1 (17), 391-395, 2009 | | 2009 |
Analysis of potential function in cylindrical nanowires M Zangeneh, H Aghababa, B Forouzandeh 2008 International Semiconductor Conference 2, 355-358, 2008 | | 2008 |