Approximate circuits S Reda, M Shafique Cham: Springer, 2019 | 51 | 2019 |
One method-all error-metrics: A three-stage approach for error-metric evaluation in approximate computing S Froehlich, D Große, R Drechsler 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 284-287, 2019 | 28 | 2019 |
Approximate hardware generation using symbolic computer algebra employing grobner basis S Froehlich, D Große, R Drechsler 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 889-892, 2018 | 26 | 2018 |
Error bounded exact BDD minimization in approximate computing S Froehlich, D Große, R Drechsler 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 254-259, 2017 | 13 | 2017 |
Towards reversed approximate hardware design S Froehlich, D Große, R Drechsler 2018 21st Euromicro Conference on Digital System Design (DSD), 665-671, 2018 | 11 | 2018 |
Generation of verified programs for in-memory computing S Froehlich, R Drechsler 2022 25th Euromicro Conference on Digital System Design (DSD), 815-820, 2022 | 9 | 2022 |
Polynomial formal verification of approximate adders M Schnieber, S Froehlich, R Drechsler 2022 25th Euromicro Conference on Digital System Design (DSD), 761-768, 2022 | 9 | 2022 |
Unlocking approximation for in-memory computing with cartesian genetic programming and computer algebra for arithmetic circuits S Froehlich, R Drechsler it-Information Technology 64 (3), 99-107, 2022 | 7 | 2022 |
Comprime: A compiler for parallel and scalable reram-based in-memory computing S Frerix, S Shirinzadeh, S Fröhlich, R Drechsler 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 1-6, 2019 | 7 | 2019 |
XbNN: Enabling CNNs on edge devices by approximate on-chip dot product encoding L Klemmer, S Froehlich, R Drechsler, D Große 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 6 | 2021 |
Polynomial formal verification of approximate functions M Schnieber, S Froehlich, R Drechsler 2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 92-97, 2022 | 5 | 2022 |
ASNet: Introducing approximate hardware to high-level synthesis of neural networks S Froehlich, L Klemmer, D Große, R Drechsler 2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL), 64-69, 2020 | 4 | 2020 |
Approximate memory: Data storage in the context of approximate computing S Froehlich, D Große, R Drechsler Information Storage: A Multidisciplinary Perspective, 111-133, 2020 | 4 | 2020 |
Method for determining a position of a work piece in a machine tool J Röders, S Fröhlich, S Wulff US Patent 10,335,914, 2019 | 4 | 2019 |
Multiply-accumulate enhanced BDD-based logic synthesis on RRAM crossbars S Froehlich, S Shirinzadeh, R Drechsler 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 3 | 2020 |
Approximate hardware generation using formal techniques S Froehlich, D Große, R Drechsler Approximate Circuits: Methodologies and CAD, 155-174, 2018 | 2 | 2018 |
Lim-hdl: Hdl-based synthesis for in-memory computing S Froehlich, R Drechsler 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 1 | 2022 |
Parallel Computing of Graph-based Functions in ReRAM S Froehlich, S Shirinzadeh, R Drechsler ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (2), 1-24, 2022 | 1 | 2022 |
Depth Optimized Synthesis of Symmetric Boolean Functions M Schnieber, S Froehlich, R Drechsler 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 61-66, 2021 | 1 | 2021 |
Efficient machine learning through evolving combined deep neural networks R Krauss, M Merten, M Bockholt, S Froehlich, R Drechsler Proceedings of the 2020 Genetic and Evolutionary Computation Conference …, 2020 | 1 | 2020 |