Aydın Emre Güzel
Aydın Emre Güzel
PHD Candidate at Hasselt University
Bestätigte E-Mail-Adresse bei uhasselt.be - Startseite
Zitiert von
Zitiert von
Fast multiplier generator for FPGAs with LUT based partial product generation and column/row compression
A Kakacak, AE Guzel, O Cihangir, S Gören, HF Ugurdag
Integration 57, 147-157, 2017
Using high-level synthesis for rapid design of video processing pipes
AE Guzel, VE Levent, M Tosun, MA Özkan, T Akgun, D Büyükaydin, ...
2016 IEEE East-West Design & Test Symposium (EWDTS), 1-4, 2016
PoseLab: A Levenberg-Marquardt Based Prototyping Environment for Camera Pose Estimation
M Darcis, W Swinkels, AE Güzel, L Claesen
2018 11th International Congress on Image and Signal Processing, BioMedical …, 2018
Rapid Design of Real-Time Image Fusion on FPGA using HLS and Other Techniques
F Aydin, HF Ugurdag, VE Levent, AE Guzel, NFR Annafianto, MA Ozkan, ...
2018 IEEE/ACS 15th International Conference on Computer Systems and …, 2018
Tools and Techniques for Implementation of Real-time Video Processing Algorithms
VE Levent, AE Guzel, M Tosun, M Buyukmihci, F Aydin, S Gören, C Erbas, ...
Journal of Signal Processing Systems 91 (1), 93-113, 2019
Fast Incremental Least Square Pose Estimation for Hardware Implementation with Rolling Shutter Camera
AE Güzel, D Hisar, L Claesen, HF Uğurdağ
2020 28th Signal Processing and Communications Applications Conference (SIU …, 2020
High level synthesis for rapid design of video processing pipes
AE Güzel
Output domain downscaler
M Büyükmıhçı, VE Levent, AE Guzel, O Ates, M Tosun, T Akgün, C Erbas, ...
International Symposium on Computer and Information Sciences, 262-269, 2016
Fast one-and two-pick fixed-priority selection and muxing circuits
M Tosun, MA Özkan, AE Güzel, HF Ugurdag
2016 IEEE East-West Design & Test Symposium (EWDTS), 1-4, 2016
Das System kann den Vorgang jetzt nicht ausführen. Versuchen Sie es später erneut.
Artikel 1–9