Efficient FPGA implementation of OpenCL high-performance computing applications via high-level synthesis FB Muslim, L Ma, M Roozmeh, L Lavagno IEEE Access 5, 2747-2762, 2017 | 121 | 2017 |
Workflows community summit: Advancing the state-of-the-art of scientific workflows management systems research and development RF da Silva, H Casanova, K Chard, T Coleman, D Laney, D Ahn, S Jha, ... arXiv preprint arXiv:2106.05177, 2021 | 17 | 2021 |
Implementation of a performance optimized database join operation on FPGA-GPU platforms using OpenCL M Roozmeh, L Lavagno 2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and …, 2017 | 13 | 2017 |
Design Space Exploration of Multi-Core RTL via High Level Synthesis from OpenCL Models M Roozmeh, L Lavagno Microprocessors and Microsystems, 2018 | 7 | 2018 |
Designing parameterizable hardware IPs in a model-based design environment for high-level synthesis SA Butt, M Roozmeh, L Lavagno ACM Transactions on Embedded Computing Systems (TECS) 15 (2), 1-28, 2016 | 5 | 2016 |
Workflow generation with wfGenes M Roozmeh, I Kondov 2020 IEEE/ACM Workflows in Support of Large-Scale Science (WORKS), 9-16, 2020 | 3 | 2020 |
Automating and scaling task-level parallelism of tightly coupled models via code generation M Roozmeh, I Kondov International Conference on Computational Science, 69-82, 2022 | 1 | 2022 |
Workflows Community Summit: Advancing the State-of-the-art of Scientific Workflows Management Systems Research and Development R Ferreira da Silva, H Casanova, K Chard, T Coleman, D Laney, D Ahn, ... arXiv e-prints, arXiv: 2106.05177, 2021 | 1 | 2021 |
High Performance Computing via High Level Synthesis M Roozmeh Politecnico di Torino, 2018 | | 2018 |
Dithering- Analogue and telecommunication electronics M Roozmeh, A Mardani Polito.it, 2012 | | 2012 |
2020 IEEE/ACM Workflows in Support of Large-Scale Science (WORKS) M Roozmeh, I Kondov, RW Nash, MR Crusoe, J Kocot, T Szepieniec | | |