Ahmed Jerraya
Ahmed Jerraya
Bestätigte E-Mail-Adresse bei cea.fr
Zitiert von
Zitiert von
Multiprocessor systems-on-chips
A Jerraya, W Wolf
Elsevier, 2004
Multiprocessor system-on-chip (MPSoC) technology
W Wolf, AA Jerraya, G Martin
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
Component-based design approach for multicore SoCs
W Cesario, A Baghdadi, L Gauthier, D Lyonnard, G Nicolescu, Y Paviot, ...
Proceedings of the 39th annual Design Automation Conference, 789-794, 2002
Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip
D Lyonnard, S Yoo, A Baghdadi, AA Jerraya
Proceedings of the 38th annual Design Automation Conference, 518-523, 2001
Multiprocessor SoC platforms: a component-based design approach
WO Cesário, D Lyonnard, G Nicolescu, Y Paviot, S Yoo, AA Jerraya, ...
IEEE Design & Test of Computers 19 (6), 52-63, 2002
Hardware/software interface codesign for embedded systems
AA Jerraya, W Wolf
Computer 38 (2), 63-69, 2005
Automatic generation and targeting of application-specific operating systems and embedded systems software
L Gauthier, S Yoo, AA Jerraya
IEEE transactions on computer-aided design of integrated circuits and …, 2001
Synthesis steps and design models for codesign
TB Ismail, AA Jerraya
Computer 28 (2), 44-53, 1995
Behavioral synthesis and component reuse with VHDL
AA Jerraya, H Ding, P Kission, M Rahmouni
Springer Science & Business Media, 2012
Protocol selection and interface generation for HW-SW codesign
JM Daveau, GF Marchioro, T Ben-Ismail, AA Jerraya
IEEE transactions on very large scale integration (VLSI) systems 5 (1), 136-144, 1997
COSMOS: a codesign approach for communicating systems
TB Ismail, M Abid, A Jerraya
Third International Workshop on Hardware/Software Codesign, 17-24, 1994
Programming models and HW-SW interfaces abstraction for multi-processor SoC
AA Jerraya, A Bouchhima, F Pétrot
2006 43rd ACM/IEEE Design Automation Conference, 280-285, 2006
Automatic generation of fast timed simulation models for operating systems in SoC design
S Yoo, G Nicolescu, L Gauthier, AA Jerraya
Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002
Synthesis of system-level communication by an allocation-based approach
JM Daveau, TB Ismail, AA Jerraya
Proceedings of the Eighth International Symposium on System Synthesis, 150-155, 1995
SOLAR: An intermediate format for system-level modeling and synthesis
AA Jerraya, K O’Brien
Computer Aided Software/Hardware Engineering, 147-175, 1994
An optimal memory allocation for application-specific multiprocessor system-on-chip
S Meftali, F Gharsalli, F Rousseau, AA Jerraya
Proceedings of the 14th international symposium on Systems synthesis, 19-24, 2001
Address calculation for retargetable compilation and exploration of instruction-set architectures
C Liem, P Paulin, A Jerrava
33rd Design Automation Conference Proceedings, 1996, 597-600, 1996
Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures
P Gerin, S Yoo, G Nicolescu, AA Jerraya
Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001
SHAPES:: a tiled scalable software hardware architecture platform for embedded systems
R Leupers, L Thiele, AA Jerraya, P Vicini, PS Paolucci
Proceedings of the 4th International Conference on Hardware/Software …, 2006
A unified model for co-simulation and co-synthesis of mixed hardware/software systems
CA Valderrama, A Changuel, PV Raghavan, M Abid, TB Ismail, ...
Proceedings the European Design and Test Conference. ED&TC 1995, 180-184, 1995
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