Ralf Stemmer
Ralf Stemmer
OFFIS - Institut für Informatik
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Zitiert von
Zitiert von
Jahr
Power and execution time measurement methodology for sdf applications on fpga-based mpsocs
C Schlaak, M Fakih, R Stemmer
arXiv preprint arXiv:1701.03709, 2017
62017
Probabilistic state-based RT-analysis of SDFGs on MPSoCs with shared memory communication
R Stemmer, H Schlender, M Fakih, K Grüttner, W Nebel
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
32019
Towards state-based rt analysis of fsm-sadfgs on mpsocs with shared memory communication
R Stemmer, M Fakih, K Grüttner, W Nebel
Proceedings of the 9th Workshop on Rapid Simulation and Performance …, 2017
32017
Towards Probabilistic Timing Analysis for SDFGs on Tile Based Heterogeneous MPSoCs
R Stemmer, HD Vu, K Grüttner, S Le Nours, W Nebel, S Pillement
12020
Experimental evaluation of probabilistic execution-time modeling and analysis methods for SDF applications on MPSoCs
R Stemmer, HD Vu, K Grüttner, S Le Nours, W Nebel, S Pillement
International Conference on Embedded Computer Systems, 241-254, 2019
12019
Feasibility Study of Probabilistic Timing Analysis Methods for SDF Applications on Multi-Core Processors
R Stemmer, HD Vu, M Fakih, K Grüttner, S Le Nours, S Pillement
12019
Experimental Evaluation of Scenario Aware Synchronous Data Flow based Power Management
O Klemp, M Fakih, K Grüttner, R Stemmer, W Nebel
Proceedings of the International Conference on Omni-Layer Intelligent …, 2019
2019
A Fast Yet Accurate Message-level Communication Bus Model for Timing Prediction of SDFGs on MPSoC
HD Vu, S Le Nours, K Grüettner, R Stemmer, S Pillement
Asia and South Pacific Design Automation Conference_ASP-DAC 2021 (Virtual …, 0
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