Daniel Grund
Daniel Grund
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Cited by
Cited by
Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems
R Wilhelm, D Grund, J Reineke, M Schlickling, M Pister, C Ferdinand
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
GrGen: A fast SPO-based graph rewriting tool
R Geiß, G Batz, D Grund, S Hack, A Szalkowski
Graph Transformations, 383-397, 2006
Timing predictability of cache replacement policies
J Reineke, D Grund, C Berg, R Wilhelm
Real-Time Systems 37, 99-122, 2007
Register allocation for programs in SSA-form
S Hack, D Grund, G Goos
Compiler Construction, 247-262, 2006
Building timing predictable embedded systems
P Axer, R Ernst, H Falk, A Girault, D Grund, N Guan, B Jonsson, ...
ACM Transactions on Embedded Computing Systems (TECS) 13 (4), 1-37, 2014
Predictability considerations in the design of multi-core embedded systems
C Cullmann, C Ferdinand, G Gebhard, D Grund, C Maiza, J Reineke, ...
Proceedings of Embedded Real Time Software and Systems, 2010
Precise and efficient FIFO-replacement analysis based on static phase detection
D Grund, J Reineke
22nd Euromicro Conference on Real-Time Systems (ECRTS), 2010, 155-164, 2010
Static timing analysis for hard real-time systems
R Wilhelm, S Altmeyer, C Burguière, D Grund, J Herter, J Reineke, ...
Verification, Model Checking, and Abstract Interpretation, 3-22, 2010
Caches in WCET analysis
J Reineke
Universität des Saarlandes, Saarbrücken, PhD Thesis, 2008
Relative competitive analysis of cache replacement policies
J Reineke, D Grund
ACM Sigplan Notices 43 (7), 51-60, 2008
Toward precise PLRU cache analysis
D Grund, J Reineke
10th International Workshop on Worst-Case Execution Time Analysis (WCET 2010 …, 2010
Abstract interpretation of FIFO replacement
D Grund, J Reineke
Static Analysis, 120-136, 2009
A fast cutting-plane algorithm for optimal coalescing
D Grund, S Hack
Compiler Construction, 111-125, 2007
Fast liveness checking for SSA-form programs
B Boissinot, S Hack, D Grund, B Dupont de Dine hin, F Rastello
Proceedings of the 6th annual IEEE/ACM international symposium on Code …, 2008
Computation takes time, but how much?
R Wilhelm, D Grund
Communications of the ACM 57 (2), 94-103, 2014
Branch target buffers: WCET analysis framework and timing predictability
D Grund, J Reineke, G Gebhard
Journal of Systems Architecture 57 (6), 625-637, 2011
A template for predictability definitions with supporting evidence
D Grund, J Reineke, R Wilhelm
Predictability and Performance in Embedded Systems, 22--31, 2011
Branch target buffers: WCET analysis framework and timing predictability
D Grund, J Reineke, G Gebhard
Embedded and Real-Time Computing Systems and Applications, 2009
Static Cache Analysis for Real-Time Systems: LRU, FIFO, PLRU
D Grund
PhD thesis, Saarland University, 2011
Sensitivity of cache replacement policies
J Reineke, D Grund
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