Design of 1.2 kV Power Switches With LowUsing GaN-Based Vertical JFET D Ji, S Chowdhury IEEE Transactions on Electron Devices 62 (8), 2571-2578, 2015 | 64 | 2015 |
Normally OFF trench CAVET with active Mg-doped GaN as current blocking layer D Ji, MA Laurent, A Agarwal, W Li, S Mandal, S Keller, S Chowdhury IEEE Transactions on Electron Devices 64 (3), 805-808, 2016 | 50 | 2016 |
880V/2.7 mΩ· cm 2 MIS Gate Trench CAVET on Bulk GaN Substrates D Ji, A Agarwal, H Li, W Li, S Keller, S Chowdhury IEEE Electron Device Letters 39 (6), 863, 2018 | 40 | 2018 |
Demonstrating> 1.4 kV OG-FET performance with a novel double field-plated geometry and the successful scaling of large-area devices D Ji, C Gupta, SH Chan, A Agarwal, W Li, S Keller, UK Mishra, ... 2017 IEEE International Electron Devices Meeting (IEDM), 9.4. 1-9.4. 4, 2017 | 37 | 2017 |
Dispersion free 450-V p GaN-gated CAVETs with Mg-ion implanted blocking layer S Mandal, A Agarwal, E Ahmadi, KM Bhat, D Ji, MA Laurent, S Keller, ... IEEE Electron Device Letters 38 (7), 933-936, 2017 | 31 | 2017 |
Dynamic modeling and power loss analysis of high-frequency power switches based on GaN CAVET D Ji, Y Yue, J Gao, S Chowdhury IEEE Transactions on Electron Devices 63 (10), 4011-4017, 2016 | 30 | 2016 |
Large-Area In-Situ Oxide, GaN Interlayer-Based Vertical Trench MOSFET (OG-FET) D Ji, G Chirag, A Anchal, C Silvia,H, L Cory, L Wenwen, K Stacia, ... IEEE Electron Device Letters 39 (5), 711, 2018 | 29 | 2018 |
Polarization-induced remote interfacial charge scattering in Al2O3/AlGaN/GaN double heterojunction high electron mobility transistors D Ji, B Liu, Y Lu, G Liu, Q Zhu, Z Wang Applied Physics Letters 100 (13), 132105, 2012 | 27 | 2012 |
Demonstration of GaN static induction transistor (SIT) using self-aligned process W Li, D Ji, R Tanaka, S Mandal, M Laurent, S Chowdhury IEEE Journal of the Electron Devices Society 5 (6), 485-490, 2017 | 22 | 2017 |
Demonstration of GaN Current Aperture Vertical Electron Transistors With Aperture Region Formed by Ion Implantation D Ji, A Agarwal, W Li, S Keller, S Chowdhury IEEE Transactions on Electron Devices 65 (2), 483, 2018 | 18 | 2018 |
Experimental determination of impact ionization coefficients of electrons and holes in gallium nitride using homojunction structures D Ji, B Ercan, S Chowdhury Applied Physics Letters 115 (7), 073503, 2019 | 16 | 2019 |
Influence of a two-dimensional electron gas on current-voltage characteristics of Al0. 3Ga0. 7 N/GaN high electron mobility transistors J Dong, L Bing, L Yan-Wu, Z Miao, F Bo-Ling Chinese Physics B 21 (6), 067201, 2012 | 13 | 2012 |
Improved Dynamic RONof GaN Vertical Trench MOSFETs (OG-FETs) Using TMAH Wet Etch D Ji, W Li, A Agarwal, SH Chan, J Haller, D Bisi, M Labrecque, C Gupta, ... IEEE Electron Device Letters 39 (7), 1030-1033, 2018 | 11 | 2018 |
First report of scaling a normally-off in-situ oxide, GaN interlayer based vertical trench MOSFET (OG-FET) D Ji, C Gupta, A Agarwal, SH Chan, C Lund, W Li, MA Laurent, S Keller, ... 2017 75th Annual Device Research Conference (DRC), 1-2, 2017 | 11 | 2017 |
A study on the impact of channel mobility on switching performance of vertical GaN MOSFETs D Ji, W Li, S Chowdhury IEEE Transactions on Electron Devices 65 (10), 4271-4275, 2018 | 9 | 2018 |
Switching performance analysis of GaN OG-FET using TCAD device-circuit-integrated model D Ji, W Li, S Chowdhury 2018 IEEE 30th International Symposium on Power Semiconductor Devices and …, 2018 | 8 | 2018 |
A discussion on the DC and switching performance of a gallium nitride CAVET for 1.2 kV application D Ji, S Chowdhury 2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA …, 2015 | 8 | 2015 |
Design and Fabrication of Ion-Implanted Moat Etch Termination Resulting in 0.7 m cm2/1500 V GaN Diodes D Ji, S Li, B Ercan, C Ren, S Chowdhury IEEE Electron Device Letters 41 (2), 264-267, 2019 | 7 | 2019 |
Impact of trench dimensions on the device performance of GaN vertical trench MOSFETs C Gupta, D Ji, SH Chan, A Agarwal, W Leach, S Keller, S Chowdhury, ... IEEE Electron Device Letters 38 (11), 1559-1562, 2017 | 7 | 2017 |
III-nitride based N polar vertical tunnel transistor S Chowdhury, D Ji US Patent 9,893,174, 2018 | 6 | 2018 |