| Another look at LTL model checking E Clarke, O Grumberg, K Hamaguchi International Conference on Computer Aided Verification, 415-427, 1994 | 207 | 1994 |
| Another look at LTL model checking EM Clarke, O Grumberg, K Hamaguchi Formal Methods in System Design 10 (1), 47-71, 1997 | 194 | 1997 |
| The complexity of the optimal variable ordering problems of a shared binary decision diagram S Tani, K Hamaguchi, S Yajima IEICE TRANSACTIONS on Information and Systems 79 (4), 271-281, 1996 | 171 | 1996 |
| Efficient construction of binary moment diagrams for verifying arithmetic circuits K Hamaguchi, A Morita, S Yajima Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995 | 75 | 1995 |
| Ordered quantum branching programs are more powerful than ordered probabilistic branching programs under a bounded-width restriction M Nakanishi, K Hamaguchi, T Kashiwabara International Computing and Combinatorics Conference, 467-476, 2000 | 56 | 2000 |
| Design verification of asynchronous sequential circuits using symbolic model checking K Hamaguchi Proc. of International Symposium on Logic Synthesis and Microprocessor …, 1992 | 15 | 1992 |
| Symbolic simulation heuristics for high-level design descriptions with uninterpreted functions K Hamaguchi Sixth IEEE International High-Level Design Validation and Test Workshop, 25-30, 2001 | 14 | 2001 |
| Branching time regular temporal logic for model checking with linear time complexity K Hamaguchi, H Hiraishi, S Yajima International Conference on Computer Aided Verification, 253-262, 1990 | 14 | 1990 |
| On the power of non-deterministic quantum finite automata M Nakanishi, T Indoh, K Hamaguchi, T Kashiwabara IEICE TRANSACTIONS on Information and Systems 85 (2), 327-332, 2002 | 12 | 2002 |
| Symbolic checking of signal-transition consistency for verifying high-level designs K Hamaguchi, H Urushihara, T Kashiwabara International Conference on Formal Methods in Computer-Aided Design, 492-506, 2000 | 11 | 2000 |
| Vectorized symbolic model checking of computation tree logic for sequential machine verification H Hiraishi, K Hamaguchi, H Ochi, S Yajima International Conference on Computer Aided Verification, 214-224, 1991 | 9 | 1991 |
| Expressive power of quantum pushdown automata with classical stack operations under the perfect-soundness condition M Nakanishi, K Hamaguchi, T Kashiwabara IEICE TRANSACTIONS on Information and Systems 89 (3), 1120-1127, 2006 | 7 | 2006 |
| Formal verification of speed-dependent asynchronous circuits using symbolic model checking of branching time regular temporal logic K Hamaguchi, H Hiraishi, S Yajima International Conference on Computer Aided Verification, 410-420, 1991 | 7 | 1991 |
| Compact test sequences for scan-based sequential circuits H Higuchi, K Hamaguchi, S Yajima IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and …, 1993 | 6 | 1993 |
| On the power of quantum pushdown automata with a classical stack and 1.5-way quantum finite automata KHM Nakanishi, T Indoh, K Hamaguchi, T Kashiwabara NAIST-IS-TR2001005, 2001 | 4 | 2001 |
| Manipulation of large-scale polynomials using BMDs D ROTTER, K HAMAGUCHI, S MINATO, S YAJIMA IEICE transactions on fundamentals of electronics, communications and …, 1997 | 4 | 1997 |
| Formal design verification of sequential machines based on symbolic model checking for branching time regular temporal logic K HAMAGUCHI, H HIRAISHI, S YAJIMA IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and …, 1992 | 4 | 1992 |
| Design verification of a microprocessor using branching time regular temporal logic K Hamaguchi, H Hiraishi, S Yajima International Conference on Computer Aided Verification, 206-219, 1992 | 4 | 1992 |
| Satisfiability checking for logic with equality and uninterpreted functions under equivalence constraints H Kozawa, K Hamaguchi, T Kashiwabara IEICE Transactions on Fundamentals of Electronics, Communications and …, 2007 | 3 | 2007 |
| Automatic monitor generation from regular expression based specifications for module interface verification Y Kakiuchi, A Kitajima, K Hamaguchi, T Kashiwabara 2005 IEEE International Symposium on Circuits and Systems, 3555-3558, 2005 | 3 | 2005 |
