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Sadia Shireen
Sadia Shireen
Bestätigte E-Mail-Adresse bei sitpune.edu.in
Titel
Zitiert von
Zitiert von
Jahr
Minimum passive components based lossy and lossless inductor simulators employing a new active block
F Mohammad, J Sampe, S Shireen, SHM Ali
AEU-International Journal of Electronics and Communications 82, 226-240, 2017
342017
Lossy and lossless inductance simulators and universal filters employing a new versatile active block
M Faseehuddin, J Sampe, S Shireen, SHM Ali
Informacije MIDEM 48 (2), 97-114, 2018
322018
Minimum component all pass filters using a new versatile active element
M Faseehuddin, J Sampe, S Shireen, SH Md Ali
Journal of Circuits, Systems and Computers 29 (05), 2050078, 2020
122020
Voltage differencing buffered amplifier-based novel truly mixed-mode biquadratic universal filter with versatile input/output features
M Faseehuddin, N Herencsar, S Shireen, W Tangsrirat, SH Md Ali
Applied Sciences 12 (3), 1229, 2022
102022
A novel mix-mode universal filter employing a single active element and minimum number of passive components
M Faseehuddin, J Sampe, S Shireen, SHM Ali
Informacije MIDEM 47 (4), 211-222, 2017
72017
Electronically tunable mixed mode universal filter employing grounded capacitors utilizing highly versatile VD-DVCC
M Faseehuddin, N Herencsar, MA Albrni, S Shireen, J Sampe
Circuit World 48 (4), 511-528, 2022
52022
Minimum passive components based lossy and lossless inductor simulators employing a new active block, AEU-Int
M Faseehuddin, J Sampe, S Shireen, SHM Ali
J. Electron. Commun 82, 226-240, 2017
52017
Novel FDNR, FDNC and lossy inductor simulators employing second generation voltage conveyor (VCII)
M Faseehuddin, S Shireen, N Herencsar, W Tangsrirat
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2023
32023
Minimum component high frequency current mode rectifier
J Sampe, M Faseehuddin, S Shireen, SHM Ali
Journal of Fundamental and Applied Sciences 9 (6S), 184-203, 2017
22017
Novel Lossless Positive-/Negative-Grounded Capacitance Multipliers Using VCII
M Faseehuddin, S Shireen, SHM Ali, W Tangsrirat
Elektronika ir Elektrotechnika 29 (4), 19-26, 2023
2023
Minimum Component Truly Mixed Mode First Order Universal Filter Employing EXCCTA
S Perumal, M Faseehuddin, A Kukker, S Shireen, W Tangsrirat
Informacije MIDEM 53 (3), 177-189, 2023
2023
16nm BULK CMOS DOCCCII BASED CONFIGURABLE ANALOG BLOCK DESIGN FOR FIELD PROGRAMMABLE ANALOG ARRAY
S Shireen, M Faseehuddin
DOCCCII based Configurable Analog Block Design for FPAA Implementation in 16nm Technology
S Shireen, M Faseehuddin, MY Yasin
Design of Topologies of Current Controlled Current Conveyor in 16 nm Bulk CMOS Technology
M Faseehuddin, S Shireen
International Journal of Scientific and Research Publications, 588, 0
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