| Design of parasitic and process-variation aware nano-CMOS RF circuits: A VCO case study D Ghai, SP Mohanty, E Kougianos IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (9 …, 2009 | 79 | 2009 |
| Comparative analysis of double gate FinFET configurations for analog circuit design D Ghai, SP Mohanty, G Thakral 2013 IEEE 56th International Midwest Symposium on Circuits and Systems …, 2013 | 35 | 2013 |
| Novel intrusion detection and prevention for mobile ad hoc networks: A single-and multiattack case study G Vaseer, G Ghai, D Ghai IEEE Consumer Electronics Magazine 8 (3), 35-39, 2019 | 24 | 2019 |
| Process variation analysis and optimization of a FinFET-based VCO VP Yanambaka, SP Mohanty, E Kougianos, D Ghai, G Ghai IEEE Transactions on Semiconductor Manufacturing 30 (2), 126-134, 2017 | 20 | 2017 |
| Parasitic aware process variation tolerant voltage controlled oscillator (VCO) design D Ghai, SP Mohanty, E Kougianos 9th International Symposium on Quality Electronic Design (isqed 2008), 330-333, 2008 | 19 | 2008 |
| Fast optimization of nano-CMOS voltage-controlled oscillator using polynomial regression and genetic algorithm D Ghai, SP Mohanty, G Thakral Microelectronics Journal 44 (8), 631-641, 2013 | 18 | 2013 |
| A 45nm flash analog to digital converter for low voltage high speed system on chips D Ghai, SP Mohanty, E Kougianos Proceedings of the 13th NASA Symposium on VLSI Design 3, 2007 | 17 | 2007 |
| Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study D Ghai, SP Mohanty, G Thakral International Symposium on Quality Electronic Design (ISQED), 406-411, 2013 | 14 | 2013 |
| A combined DOE-ILP based power and read stability optimization in nano-CMOS SRAM G Thakral, SP Mohanty, D Ghai, DK Pradhan 2010 23rd International Conference on VLSI Design, 45-50, 2010 | 12 | 2010 |
| Federated learning NK Ray, D Puthal, D Ghai IEEE Consumer Electronics Magazine 10 (6), 106-107, 2021 | 11 | 2021 |
| Double gate FinFET based mixed-signal design: A VCO case study D Ghai, SP Mohanty, G Thakral 2013 IEEE 56th International Midwest Symposium on Circuits and Systems …, 2013 | 11 | 2013 |
| A Dual Oxide CMOS Universal Voltage Converter for Power Management in Multi-VDD SoCs D Ghai, SP Mohanty, E Kougianos 9th International Symposium on Quality Electronic Design (isqed 2008), 257-260, 2008 | 11 | 2008 |
| P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP G Thakral, SP Mohanty, D Ghai, DK Pradhan 2010 11th International Symposium on Quality Electronic Design (ISQED), 176-183, 2010 | 10 | 2010 |
| A PVT aware accurate statistical logic library for high-κ metal-gate nano-CMOS D Ghai, SP Mohanty, E Kougianos, P Patra 2009 10th International Symposium on Quality Electronic Design, 47-54, 2009 | 10 | 2009 |
| Interdependency study of process and design parameter scaling for power optimization of nano-CMOS circuits under process variation SP Mohanty, E Kougianos, D Ghai, P Patra Proceedings of the 16th ACM/IEEE International Workshop on Logic and …, 2007 | 10 | 2007 |
| Variability-aware optimization of nano-CMOS Active Pixel Sensors using design and analysis of Monte Carlo experiments D Ghai, SP Mohanty, E Kougianos 2009 10th International Symposium on Quality Electronic Design, 172-178, 2009 | 9 | 2009 |
| A neighbor trust-based mechanism to protect mobile networks G Vaseer, G Ghai, D Ghai, PS Patheja IEEE potentials 38 (1), 20-25, 2018 | 7 | 2018 |
| A universal level converter towards the realization of energy efficient implantable drug delivery nano-electro-mechanical-systems SP Mohanty, D Ghai, E Kougianos, B Joshi 2009 10th International Symposium on Quality Electronic Design, 673-679, 2009 | 7 | 2009 |
| A P4VT (Power Performance Process Parasitic Voltage Temperature) Aware Dual-VTh Nano-CMOS VCO SP Mohanty, D Ghai, E Kougianos 2010 23rd International Conference on VLSI Design, 99-104, 2010 | 6 | 2010 |
| Unified P4 (power-performance-process-parasitic) fast optimization of a nano-CMOS VCO D Ghai, SP Mohanty, E Kougianos Proceedings of the 19th ACM Great Lakes symposium on VLSI, 303-308, 2009 | 5 | 2009 |
