Yi (Estelle) Wang
Yi (Estelle) Wang
Contiental Automotive
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Zitiert von
Zitiert von
FPGA-based 40.9-Gbits/s masked AES with area optimization for storage area network
Y Wang, Y Ha
IEEE Transactions on Circuits and Systems II: Express Briefs 60 (1), 36-40, 2013
FPGA implementations of the AES masked against power analysis attacks
F Regazzoni, Y Wang, FX Standaert
Proceedings of COSADE 2011, 56-66, 2011
An improved ridge features extraction algorithm for distorted fingerprints matching
TH Nguyen, Y Wang, R Li
Journal of Information Security and Applications 18 (4), 206-214, 2013
FPGA based optimization for masked AES implementation
Z Yuan, Y Wang, J Li, R Li, W Zhao
2011 IEEE 54th International Midwest Symposium on Circuits and Systems …, 2011
Improved chaff point generation for vault scheme in bio‐cryptosystems
TH Nguyen, Y Wang, Y Ha, R Li
IET biometrics 2 (2), 48-55, 2013
High throughput and resource efficient AES encryption/decryption for SANs
Y Wang, Y Ha
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1166-1169, 2016
A fingerprint fuzzy vault scheme using a fast chaff point generation algorithm
TH Nguyen, Y Wang, TN Nguyen, R Li
2013 IEEE International Conference on Signal Processing, Communication and …, 2013
A unified architecture for a public key cryptographic coprocessor
Y Wang, DL Maskell, J Leiwo
Journal of Systems Architecture 54 (10), 1004-1016, 2008
A performance and area efficient ASIP for higher-order DPA-resistant AES
Y Wang, Y Ha
IEEE journal on emerging and selected topics in circuits and systems 4 (2 …, 2014
Performance and security‐enhanced fuzzy vault scheme based on ridge features for distorted fingerprints
TH Nguyen, Y Wang, Y Ha, R Li
IET Biometrics 4 (1), 29-39, 2015
On the security of in-vehicle hybrid network: Status and challenges
T Huang, J Zhou, Y Wang, A Cheng
International Conference on Information Security Practice and Experience …, 2017
A unified architecture for supporting operations of AES and ECC
Y Wang, R Li
2011 Fourth International Symposium on Parallel Architectures, Algorithms …, 2011
An efficient algorithm for DPA-resistent RSA
Y Wang, J Leiwo, T Srikanthan, L Jianwen
APCCAS 2006-2006 IEEE Asia Pacific Conference on Circuits and Systems, 1659-1662, 2006
FPGA-based SHA-3 acceleration on a 32-bit processor via instruction set extension
Y Wang, Y Shi, C Wang, Y Ha
2015 IEEE International Conference on Electron Devices and Solid-State …, 2015
Improvement on masked S-box hardware implementation
J Zeng, Y Wang, C Xu, R Li
2012 International Conference on Innovations in Information Technology (IIT …, 2012
Reconfiguring three-dimensional processor arrays for fault-tolerance: Hardness and heuristic algorithms
G Jiang, J Wu, Y Ha, Y Wang, J Sun
IEEE Transactions on Computers 64 (10), 2926-2939, 2015
Unified signed-digit number adder for RSA and ECC public-key cryptosystems
Y Wang, DL Maskell, J Leiwo, T Srikanthan
APCCAS 2006-2006 IEEE Asia Pacific Conference on Circuits and Systems, 1655-1658, 2006
A highly efficient side channel attack with profiling through relevance-learning on physical leakage information
AA Pammu, KS Chong, Y Wang, BH Gwee
IEEE Transactions on Dependable and Secure Computing 16 (3), 376-387, 2018
VMSIM: Virtual machine based a full system simulation platform for microprocessors' functional verification
J An, X Fan, S Zhang, D Wang, Y Wang
Third International Conference on Information Technology: New Generations …, 2006
FPGA-based high throughput XTS-AES encryption/decryption for storage area network
Y Wang, A Kumar, Y Ha
2014 International Conference on Field-Programmable Technology (FPT), 268-271, 2014
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