Neuromorphic hardware in the loop: Training a deep spiking network on the brainscales wafer-scale system S Schmitt, J Klähn, G Bellec, A Grübl, M Guettler, A Hartel, S Hartmann, ... 2017 international joint conference on neural networks (IJCNN), 2227-2234, 2017 | 168 | 2017 |
Demonstrating hybrid learning in a flexible neuromorphic hardware system S Friedmann, J Schemmel, A Grübl, A Hartel, M Hock, K Meier IEEE transactions on biomedical circuits and systems 11 (1), 128-142, 2016 | 134 | 2016 |
Demonstrating advantages of neuromorphic computation: a pilot study T Wunderlich, AF Kungl, E Müller, A Hartel, Y Stradmann, SA Aamir, ... Frontiers in neuroscience 13, 260, 2019 | 123 | 2019 |
An accelerated LIF neuronal network array for a large-scale mixed-signal neuromorphic architecture SA Aamir, Y Stradmann, P Müller, C Pehle, A Hartel, A Grübl, J Schemmel, ... IEEE Transactions on Circuits and Systems I: Regular Papers 65 (12), 4299-4312, 2018 | 101 | 2018 |
A highly tunable 65-nm CMOS LIF neuron for a large scale neuromorphic system SA Aamir, P Müller, A Hartel, J Schemmel, K Meier ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 71-74, 2016 | 51 | 2016 |
Versatile emulation of spiking neural networks on an accelerated neuromorphic substrate S Billaudelle, Y Stradmann, K Schreiber, B Cramer, A Baumbach, D Dold, ... 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 49 | 2020 |
Accelerated physical emulation of bayesian inference in spiking neural networks AF Kungl, S Schmitt, J Klähn, P Müller, A Baumbach, D Dold, A Kugele, ... Frontiers in neuroscience 13, 1201, 2019 | 32 | 2019 |
An analog dynamic memory array for neuromorphic hardware M Hock, A Hartel, J Schemmel, K Meier 2013 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2013 | 31 | 2013 |
Pattern representation and recognition with accelerated analog neuromorphic systems MA Petrovici, S Schmitt, J Klähn, D Stöckel, A Schroeder, G Bellec, J Bill, ... 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 22 | 2017 |
Towards biologically realistic multi-compartment neuron model emulation in analog VLSI. S Millner, A Hartel, J Schemmel, K Meier ESANN, 2012 | 12 | 2012 |
Implementation and Characterization of Mixed-Signal Neuromorphic ASICs A Hartel | 7 | 2016 |
KIRCHHOFF-INSTITUT FÜR PHYSIK A Hartel, NN Chip | | |