Andrew B. Kahng
Andrew B. Kahng
Professor of CSE and ECE, UC San Diego
Verified email at eng.ucsd.edu
Title
Cited by
Cited by
Year
Cooperative mobile robotics: Antecedents and directions
YU Cao, AB Kahng, AS Fukunaga
Robot colonies, 7-27, 1997
17631997
New spectral methods for ratio cut partitioning and clustering
L Hagen, AB Kahng
IEEE transactions on computer-aided design of integrated circuits and …, 1992
13581992
ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration
AB Kahng, B Li, LS Peh, K Samadi
2009 Design, Automation & Test in Europe Conference & Exhibition, 423-428, 2009
9792009
Recent directions in netlist partitioning: A survey
CJ Alpert, AB Kahng
Integration 19 (1-2), 1-81, 1995
9191995
A new adaptive multi-start technique for combinatorial global optimizations
KD Boese, AB Kahng, S Muddu
Operations Research Letters 16 (2), 101-113, 1994
4991994
Can recursive bisection alone produce routable placements?
AE Caldwell, AB Kahng, IL Markov
Proceedings of the 37th annual design automation conference, 477-482, 2000
4812000
Accuracy-configurable adder for approximate arithmetic designs
AB Kahng, S Kang
Proceedings of the 49th Annual Design Automation Conference, 820-825, 2012
4802012
Cooperative mobile robotics: Antecedents and directions
YU Cao, AS Fukunaga, AB Kahng, F Meng
Proceedings 1995 IEEE/RSJ International Conference on Intelligent Robots and …, 1995
4461995
Multilevel circuit partitioning
CJ Alpert, JH Huang, AB Kahng
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1998
3891998
Zero skew clock routing with minimum wirelength
TH Chao, YC Hsu, JM Ho, KD Boese, AB Kahng
IEEE Trans. on Circuits and Systems 39 (11), 799-814, 1992
3811992
An analytical delay model for RLC interconnects
AB Kahng, S Muddu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1997
3511997
VLSI physical design: from graph partitioning to timing closure
AB Kahng, J Lienig, IL Markov, J Hu
Springer Science & Business Media, 2011
3202011
Orion 2.0: A power-area simulator for interconnection networks
AB Kahng, B Li, LS Peh, K Samadi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (1), 191-196, 2011
3112011
2001 technology roadmap for semiconductors
A Allan, D Edenfeld, WH Joyner, AB Kahng, M Rodgers, Y Zorian
Computer 35 (1), 42-53, 2002
3062002
A new class of iterative Steiner tree heuristics with good performance
AB Kahng, G Robins
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1992
2851992
On optimal interconnections for VLSI
AB Kahng, G Robins
Springer Science & Business Media, 1994
2811994
Watermarking techniques for intellectual property protection
AB Kahng, J Lach, WH Mangione-Smith, S Mantik, IL Markov, ...
Proceedings of the 35th annual Design Automation Conference, 776-781, 1998
2761998
Zero-skew clock routing trees with minimum wirelength
KD Boese, AB Kahng
[1992] Proceedings. Fifth Annual IEEE International ASIC Conference and …, 1992
2681992
Provably good performance-driven global routing
J Cong, AB Kahng, G Robins, M Sarrafzadeh, CK Wong
IEEE transactions on computer-aided design of integrated circuits and …, 1992
2661992
Gate-length biasing for digital circuit optimization
P Gupta, AB Kahng
US Patent 7,441,211, 2008
2592008
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