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Valeria Bertacco
Valeria Bertacco
Professor, Computer Science and Engineering, University of Michigan
Bestätigte E-Mail-Adresse bei umich.edu - Startseite
Titel
Zitiert von
Zitiert von
Jahr
GPU computing gems jade edition
W Hwu
Elsevier, 2011
3772011
A highly resilient routing algorithm for fault-tolerant NoCs
D Fick, A DeOrio, G Chen, V Bertacco, D Sylvester, D Blaauw
2009 Design, Automation & Test in Europe Conference & Exhibition, 21-26, 2009
3092009
Reliable systems on unreliable fabrics
T Austin, V Bertacco, S Mahlke, Y Cao
IEEE Design & Test of Computers 25 (4), 322-332, 2008
2532008
BulletProof: A defect-tolerant CMP switch architecture
K Constantinides, S Plaza, J Blome, B Zhang, V Bertacco, S Mahlke, ...
The Twelfth International Symposium on High-Performance Computer …, 2006
2492006
Vicis: A reliable network for unreliable silicon
D Fick, A DeOrio, J Hu, V Bertacco, D Blaauw, D Sylvester
Proceedings of the 46th Annual Design Automation Conference, 812-817, 2009
2362009
Opportunities and challenges for better than worst-case design
T Austin, V Bertacco, D Blaauw, T Mudge
Proceedings of the 2005 Asia and South Pacific Design Automation Conference, 2-7, 2005
2072005
The disjunctive decomposition of logic functions
V Bertacco, M Damiani
iccad 97, 78-82, 1997
2071997
Ultra low-cost defect protection for microprocessor pipelines
S Shyam, K Constantinides, S Phadke, V Bertacco, T Austin
ACM SIGARCH Computer Architecture News 34 (5), 73-82, 2006
1792006
Smart simulation using collaborative formal and simulation engines
PH Ho, T Shiple, K Harer, J Kukula, R Damiano, V Bertacco, J Taylor, ...
IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000
1692000
Software-based online detection of hardware defects mechanisms, architectural support, and evaluation
K Constantinides, O Mutlu, T Austin, V Bertacco
40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2007
1402007
Fault-based attack of RSA authentication
A Pellegrini, V Bertacco, T Austin
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
1302010
Event-driven gate-level simulation with GP-GPUs
D Chatterjee, A DeOrio, V Bertacco
Proceedings of the 46th Annual Design Automation Conference, 557-562, 2009
1242009
A reliable routing architecture and algorithm for NoCs
A DeOrio, D Fick, V Bertacco, D Sylvester, D Blaauw, J Hu, G Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012
1212012
Ariadne: Agnostic reconfiguration in a disconnected network environment
K Aisopos, A DeOrio, LS Peh, V Bertacco
2011 International Conference on Parallel Architectures and Compilation …, 2011
1212011
GPU computing gems emerald edition
WH Wen-Mei
Elsevier, 2011
119*2011
Regaining lost cycles with HotCalls: A fast interface for SGX secure enclaves
O Weisse, V Bertacco, T Austin
ACM SIGARCH Computer Architecture News 45 (2), 81-93, 2017
1112017
Fixing Design Errors With Counterexamples and Resynthesis
K Chang, IL Markov, V Bertacco
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
1082008
Power-aware NoCs through routing and topology reconfiguration
R Parikh, R Das, V Bertacco
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
1062014
Automating Postsilicon Debugging and Repair
K Chang, IL Markov, V Bertacco
Computer 41 (7), 47, 2008
1022008
Decision diagrams and pass transistor logic synthesis
V Bertacco, S Minato, P Verplaetse, L Benini, G De Micheli
Int'l Workshop on Logic Synth 168, 1997
1001997
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