Thilo Pionteck
Zitiert von
Zitiert von
Applying partial reconfiguration to networks-on-chips
T Pionteck, R Koch, C Albrecht
2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006
Design and implementation of a coarse-grained dynamically reconfigurable hardware architecture
J Becker, T Pionteck, C Habermann, M Glesner
Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging …, 2001
DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communication Applications
J Becker, T Pionteck, M Glesner
International Workshop on Field Programmable Logic and Applications, 312-321, 2000
Design of a reconfigurable AES encryption/decryption engine for mobile terminals
T Pionteck, T Staake, T Stiefmeier, LD Kabulepa, M Glesner
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No …, 2004
MONSUN II: A small and inexpensive AUV for underwater swarms
C Osterloh, T Pionteck, E Maehle
ROBOTIK 2012; 7th German Conference on Robotics, 1-6, 2012
A dynamically reconfigurable packet-switched network-on-chip
T Pionteck, C Albrecht, R Koch
Proceedings of the Design Automation & Test in Europe Conference 1, 8 pp., 2006
Communication architectures for dynamically reconfigurable FPGA designs
T Pionteck, C Albrecht, R Koch, E Maehle, M Hubner, J Becker
2007 IEEE International Parallel and Distributed Processing Symposium, 1-8, 2007
Hardware-accelerated join processing in large Semantic Web databases with FPGAs
S Werner, S Groppe, V Linnemann, T Pionteck
2013 International Conference on High Performance Computing & Simulation …, 2013
An adaptive system-on-chip for network applications
R Koch, T Pionteck, C Albrecht, E Maehle
Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006
An application-tailored dynamically reconfigurable hardware architecture for digital baseband processing
J Becker, T Pionteck, M Glesner
Proceedings 13th Symposium on Integrated Circuits and Systems Design (Cat …, 2000
MONSUN II-towards autonomous underwater swarms for environmental monitoring
C Osterloh, B Meyer, A Amory, T Pionteck, E Maehle
International Conference on Intelligent Robots and Systems (IROS2012 …, 2012
Adaptive communication architectures for runtime reconfigurable system-on-chips
T Pionteck, C Albrecht, R Koch, E Maehle
Parallel Processing Letters 18 (02), 275-289, 2008
Integration of FPGAs in database management systems: challenges and opportunities
A Becher, L BG, D Broneske, T Drewes, B Gurumurthy, K Meyer-Wegener, ...
Datenbank-Spektrum 18 (3), 145-156, 2018
Identifying homogenous reconfigurable regions in heterogeneous FPGAs for module relocation
R Backasch, G Hempel, S Werner, S Groppe, T Pionteck
2014 International Conference on ReConFigurable Computing and FPGAs …, 2014
Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs
JM Joseph, C Blochwitz, A García-Ortiz, T Pionteck
Microprocessors and Microsystems 48, 36-47, 2017
Adaptive systems-on-chip: architectures, technologies and applications
J Becker, T Pionteck, M Glesner
Symposium on Integrated Circuits and Systems Design, 2-7, 2001
Accelerated join evaluation in Semantic Web databases by using FPGAs
S Werner, D Heinrich, M Stelzner, V Linnemann, T Pionteck, S Groppe
Concurrency and Computation: Practice and Experience 28 (7), 2031-2051, 2016
Modelling tile-based run-time reconfigurable systems using systemC
C Albrecht, T Pionteck, R Koch, E Maehle, R Allee
21st European Conference on Modelling and Simulation, 509-514, 2007
A cycle-accurate network-on-chip simulator with support for abstract task graph modeling
JM Joseph, T Pionteck
2014 International Symposium on System-on-Chip (SoC), 1-6, 2014
Parallel and pipelined filter operator for hardware-accelerated operator graphs in semantic web databases
S Werner, D Heinrich, M Stelzner, S Groppe, R Backasch, T Pionteck
2014 IEEE International Conference on Computer and Information Technology …, 2014
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