Manar El-Chammas
Manar El-Chammas
Unknown affiliation
Verified email at el-chammas.com
Title
Cited by
Cited by
Year
A 12-GS/s 81-mW 5-bit time-interleaved flash ADC with background timing skew calibration
M El-Chammas, B Murmann
VLSI Circuits (VLSIC), 2010 IEEE Symposium on, 157-158, 2010
3142010
General analysis on the impact of phase-skew in time-interleaved ADCs
M El-Chammas, B Murmann
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on, 17-20, 2008
1002008
A 12b 1GS/s SiGe BiCMOS two-way time-interleaved pipeline ADC
R Payne, C Sestok, W Bright, M El-Chammas, M Corsi, D Smith, N Tal
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011…, 2011
492011
Background calibration of time-interleaved data converters
M El-Chammas, B Murmann
Springer Science & Business Media, 2011
272011
15.8 90dB-SFDR 14b 500MS/S BiCMOS switched-current pipelined ADC
M El-Chammas, X Li, S Kimura, J Coulon, J Hu, D Smith, P Landman, ...
Solid-State Circuits Conference-(ISSCC), 2015 IEEE International, 1-3, 2015
262015
A 12 Bit 1.6 GS/s BiCMOS 2 2 Hierarchical Time-Interleaved Pipeline ADC
M El-Chammas, X Li, S Kimura, K Maclean, J Hu, M Weaver, ...
IEEE Journal of Solid-State Circuits 49 (9), 1876-1885, 2014
242014
Background calibration of timing skew in time-interleaved A/D converters
MI El-Chammas
Stanford University, 2010
92010
Background DAC calibration for pipeline ADC
MI El-Chammas
US Patent 9,136,856, 2015
42015
Voltage domain correction technique for timing skew errors in time interleaved ADCs
PK Venkatachala, A ElShater, Y Xu, M El-Chammas, UK Moon
Circuits and Systems (ISCAS), 2017 IEEE International Symposium on, 1-4, 2017
32017
Robust encoder for folding analog to digital converter
MI El-Chammas
US Patent 8,547,269, 2013
32013
Time-Interleaved ADCs
M El-Chammas, B Murmann
Background calibration of time-interleaved data converters, 5-30, 2012
32012
Analog to digital converter error rate reduction
MI El-Chammas
US Patent 9,941,896, 2018
12018
Track and hold with active charge cancellation
H Aggrawal, MI El-Chammas
US Patent App. 15/261,303, 2017
12017
A 12 bit 1.6 GS/s BiCMOS 2 2 hierarchical time-interleaved pipeline ADC
M El-Chammas, X Li, S Kimura, K Maclean, J Hu, M Weaver, ...
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2013 IEEE, 61-64, 2013
12013
Background calibration for digital-to-analog converters
MI El-Chammas
US Patent 9,831,886, 2017
2017
High speed dynamic comparator
MI El-Chammas
US Patent 9,013,344, 2015
2015
Architecture Optimization
M El-Chammas, B Murmann
Background Calibration of Time-Interleaved Data Converters, 53-63, 2012
2012
Mitigation of Timing Skew
M El-Chammas, B Murmann
Background Calibration of Time-Interleaved Data Converters, 31-51, 2012
2012
Measurement Results
M El-Chammas, B Murmann
Background Calibration of Time-Interleaved Data Converters, 81-92, 2012
2012
Circuit Design
M El-Chammas, B Murmann
Background Calibration of Time-Interleaved Data Converters, 65-79, 2012
2012
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