| Remix: rebalanced mixup HP Chou, SC Chang, JY Pan, W Wei, DC Juan Computer Vision–ECCV 2020 Workshops: Glasgow, UK, August 23–28, 2020 …, 2020 | 300 | 2020 |
| Monas: Multi-objective neural architecture search using reinforcement learning CH Hsu, SH Chang, JH Liang, HP Chou, CH Liu, SC Chang, JY Pan, ... arXiv preprint arXiv:1806.10332, 2018 | 229 | 2018 |
| Perturb and simplify: Multilevel boolean network optimizer SC Chang, M Marek-Sadowska, KT Cheng IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996 | 185 | 1996 |
| A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips International Solid-State Circuits Conference ISSCC, 240-242, 2020 | 182* | 2020 |
| Optimization of pattern matching circuits for regular expression on FPGA CH Lin, CT Huang, CP Jiang, SC Chang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (12 …, 2007 | 176 | 2007 |
| 16.3 A 28nm 384kb 6T-SRAM computation-in-memory macro with 8b precision for AI edge chips JW Su, YC Chou, R Liu, TW Liu, PJ Lu, PC Wu, YL Chung, LY Hung, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 250-252, 2021 | 172 | 2021 |
| Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams SC Chang, M Marek-Sadowdka, TT Hwang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996 | 161 | 1996 |
| Logic synthesis for engineering change C Lin, KC Chen, SC Chang, M Marek-Sadowska, KT Cheng Proceedings of the 32nd Annual ACM/IEEE Design Automation Conference, 647-652, 1995 | 150 | 1995 |
| Accelerating pattern matching using a novel parallel algorithm on GPUs CH Lin, CH Liu, LS Chien, SC Chang IEEE Transactions on Computers 62 (10), 1906-1916, 2012 | 121 | 2012 |
| A 28nm 1Mb time-domain computing-in-memory 6T-SRAM macro with a 6.6 ns latency, 1241GOPS and 37.01 TOPS/W for 8b-MAC operations for edge-AI devices PC Wu, JW Su, YL Chung, LY Hong, JS Ren, FC Chang, Y Wu, HY Chen, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 113 | 2022 |
| Accelerating string matching using multi-threaded algorithm on GPU CH Lin, SY Tsai, CH Liu, SC Chang, JM Shyu 2010 IEEE Global Telecommunications Conference GLOBECOM 2010, 1-5, 2010 | 109 | 2010 |
| Optimization of regular expression pattern matching circuits on FPGA CH Lin, CT Huang, CP Jiang, SC Chang Design, Automation and Test in Europe, 2006 | 96 | 2006 |
| Circuit optimization by rewiring SC Chang, LPPP Van Ginneken, M Marek-Sadowska IEEE Transactions on computers 48 (9), 962-970, 1999 | 94 | 1999 |
| A fuzzy-matching model with grid reduction for lithography hotspot detection WY Wen, JC Li, SY Lin, JY Chen, SC Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 91 | 2014 |
| Complement objective training HY Chen, PH Wang, CH Liu, SC Chang, JY Pan, YT Chen, W Wei, ... arXiv preprint arXiv:1903.01182, 2019 | 75 | 2019 |
| Timing driven power gating DS Chiou, SH Chen, SC Chang, C Yeh Proceedings of the 43rd annual design automation conference, 121-124, 2006 | 75 | 2006 |
| Improving adversarial robustness via guided complement entropy HY Chen, JH Liang, SC Chang, JY Pan, YT Chen, W Wei, DC Juan Proceedings of the IEEE/CVF international conference on computer vision …, 2019 | 71 | 2019 |
| Fast boolean optimization by rewiring SC Chang, LPPP van Ginneken, M Marek-Sadowska Proceedings of International Conference on Computer Aided Design, 262-269, 1996 | 71 | 1996 |
| Postlayout logic restructuring using alternative wires SC Chang, KT Cheng, NS Woo, M Marek-Sadowska IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1997 | 69 | 1997 |
| Layout driven logic synthesis for FPGAs SC Chang, KT Cheng, NS Woo, M Marek-Sadowska Design Automation Conference 4 (g5), o1, 1994 | 68 | 1994 |
Da-Cheng JuanGoogle Research, National Tsing Hua University, Carnegie Mellon UniversityVerified email at dacheng.info
