| Analysing sanity of requirements for avionics systems J Barnat, P Bauch, N Beneš, L Brim, J Beran, T Kratochvíla Formal Aspects of Computing, pp 1-19, 2016 | 42 | 2016 |
| Tool Chain to Support Automated Formal Verification of Avionics Simulink Designs J Barnat, J Beran, L Brim, T Kratochvíla, P Ročkai Formal Methods for Industrial Critical Systems, 78-92, 2012 | 39 | 2012 |
| Executing model checking counterexamples in Simulink J Barnat, L Brim, J Beran, T Kratochvíla, ÍR Oliveira Theoretical Aspects of Software Engineering (TASE), 2012 Sixth International …, 2012 | 18 | 2012 |
| Verification results in Liberouter project J Holeček, T Kratochvíla, V Řehák, D Šafránek, P Šimeček Technical Report 03, 2004 | 15 | 2004 |
| Verification of COMBO6 VHDL Design T Kratochvíla, V Řehák, P Šimeček CESNET Technical Report, 2003 | 12 | 2003 |
| Verification process of hardware design in liberouter project J Holeček, T Kratochvíla, V Řehák, D Šafránek, P Šimeček Technická Zpráva 5, 2004 | 8 | 2004 |
| How to formalize FPGA hardware design J Holeček, T Kratochvíla, V Řehák, D Šafránek, P Šimeček CESNET Technical Report 4, 2004 | 7 | 2004 |
| How to formalize fpga hardware design J Holecek, T Kratochvıla, V Rehák, D Šafránek, P Simecek Technical Report 4/2004, CESNET, 2004 | 6 | 2004 |
| CRC64 Algorithm Analysis and Verification1 P Hlávka, T Kratochvíla, V Řehák, D Šafránek, P Šimeček, T Vojnar Prague, Czech Republic: CESNET technical report, 2005 | 5 | 2005 |
| Formal Verification of a FIFO Component in Design of Network Monitoring Hardware T Kratochvíla, V Řehák, D Šafránek Proc. of CESNET 2006 Conference, 2006 | 4 | 2006 |
| Unite: an adapter for transforming analysis tools to web services via OSLC O Vašíček, J Fiedor, T Kratochvíla, B Křena, A Smrčka, T Vojnar Proceedings of the 30th ACM Joint European Software Engineering Conference …, 2022 | 1 | 2022 |
| Formal Verification of Hardware Design T Kratochvíla MS thesis, Masaryk University, 2005 | 1 | 2005 |
| Analysing Sanity of Requirements for Avionics Systems (Preliminary Version) J Barnat, P Bauch, N Beneš, L Brim, J Beran, T Kratochvíla arXiv preprint arXiv:1510.02669, 2015 | | 2015 |
| CRC64 Algorithm Analysis and Verification D Šafránek, V Řehák, T Kratochvíla, P Šimeček, P Hlávka, T Vojnar CESNET, zspo, 2005 | | 2005 |
| Verification of Hardware Design in Liberouter Project J Holeček, T Kratochvíla, V Řehák, D Šafránek, P Šimeček | | 2004 |
Vojtech RehakMasaryk university, Faculty of InformaticsVerified email at fi.muni.cz
