Ernesto Sanchez
Ernesto Sanchez
Associate Professor at Politecnico di Torino
Verified email at - Homepage
Cited by
Cited by
Microprocessor software-based self-testing
M Psarakis, D Gizopoulos, E Sanchez, MS Reorda
IEEE Design & Test of Computers 27 (3), 4-19, 2010
Automatic test program generation: a case study
F Corno, E Sánchez, MS Reorda, G Squillero
IEEE Design & Test of Computers 21 (2), 102-109, 2004
Evolutionary Optimization: the μGP toolkit
E Sanchez, M Schillaci, G Squillero
Springer Science & Business Media, 2011
Increasing pattern recognition accuracy for chemical sensing by evolutionary based drift compensation
S Di Carlo, M Falasconi, E Sánchez, A Scionti, G Squillero, A Tonda
Pattern Recognition Letters 32 (13), 1594-1603, 2011
Evolving assembly programs: how games help microprocessor validation
F Corno, E Sánchez, G Squillero
IEEE Transactions on Evolutionary Computation 9 (6), 695-706, 2005
Development flow for on-line core self-test of automotive microcontrollers
P Bernardi, R Cantoro, S De Luca, E Sánchez, A Sansonetti
IEEE Transactions on Computers 65 (3), 744-754, 2015
A reliability analysis of a deep neural network
A Bosio, P Bernardi, A Ruospo, E Sanchez
2019 IEEE Latin American Test Symposium (LATS), 1-6, 2019
Towards automated malware creation: code generation and code integration
A Cani, M Gaudesi, E Sanchez, G Squillero, A Tonda
Proceedings of the 29th Annual ACM Symposium on Applied Computing, 157-160, 2014
On-line functionally untestable fault identification in embedded processor cores
P Bernardi, M Bonazza, E Sánchez, MS Reorda, O Ballan
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
An effective technique for the automatic generation of diagnosis-oriented programs for processor cores
P Bernardi, EES Sánchez, M Schillaci, G Squillero, MS Reorda
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
On the functional test of branch prediction units
E Sanchez, MS Reorda
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (9 …, 2014
An effective technique for minimizing the cost of processor software-based diagnosis in SoCs
P Bernardi, E Sánchez, M Schillaci, G Squillero, MS Reorda
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
Industrial applications of evolutionary algorithms
E Sanchez, G Squillero, A Tonda
Springer Berlin Heidelberg, 2012
Fault grading of software-based self-test procedures for dependable automotive applications
P Bernardi, M Grosso, E Sánchez, O Ballan
2011 Design, Automation & Test in Europe, 1-2, 2011
On the in-field functional testing of decode units in pipelined RISC processors
P Bernardi, R Cantoro, L Ciganda, E Sánchez, MS Reorda, S De Luca, ...
2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2014
On-line software-based self-test of the address calculation unit in RISC processors
P Bernardi, L Ciganda, M de Carvalho, M Grosso, J Lagos-Benites, ...
2012 17th IEEE European Test Symposium (ETS), 1-6, 2012
A hybrid approach to the test of cache memory controllers embedded in SoCs
WJ Perez, J Velasco, D Ravotto, E Sanchez, MS Reorda
2008 14th IEEE International On-Line Testing Symposium, 143-148, 2008
A functional power evaluation flow for defining test power limits during at-speed delay testing
M Valka, A Bosio, L Dilillo, P Girard, S Pravossoudovitch, A Virazel, ...
2011 Sixteenth IEEE European Test Symposium, 153-158, 2011
On the transformation of manufacturing test sets into on-line test sets for microprocessors
E Sánchez, MS Reorda, G Squillero
20th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2005
Efficient techniques for automatic verification-oriented test set optimization
E Sánchez, MS Reorda, G Squillero
International Journal of Parallel Programming 34 (1), 93-109, 2006
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