Thomas Eisenbarth
Thomas Eisenbarth
University of Lübeck
Bestätigte E-Mail-Adresse bei uni-luebeck.de - Startseite
Titel
Zitiert von
Zitiert von
Jahr
A survey of lightweight-cryptography implementations
T Eisenbarth, S Kumar, C Paar, A Poschmann, L Uhsadel
IEEE Design & Test of Computers 24 (6), 522-533, 2007
5312007
On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoq Code Hopping Scheme
T Eisenbarth, T Kasper, A Moradi, C Paar, M Salmasizadeh, ...
Annual International Cryptology Conference, 203-220, 2008
3552008
S $ A: A shared cache attack that works across cores and defies VM sandboxing--and its application to AES
G Irazoqui, T Eisenbarth, B Sunar
2015 IEEE Symposium on Security and Privacy, 591-604, 2015
2792015
Wait a minute! A fast, Cross-VM attack on AES
G Irazoqui, MS Inci, T Eisenbarth, B Sunar
International Workshop on Recent Advances in Intrusion Detection, 299-319, 2014
2492014
Correlation-enhanced power analysis collision attack
A Moradi, O Mischke, T Eisenbarth
International Workshop on Cryptographic Hardware and Embedded Systems, 125-139, 2010
2202010
Cachezoom: How SGX amplifies the power of cache attacks
A Moghimi, G Irazoqui, T Eisenbarth
International Conference on Cryptographic Hardware and Embedded Systems, 69-90, 2017
1792017
Seriously, get off my cloud! Cross-VM RSA Key Recovery in a Public Cloud.
MS Inci, B Gülmezoglu, GI Apecechea, T Eisenbarth, B Sunar
IACR Cryptol. ePrint Arch. 2015, 898, 2015
1262015
Cache attacks enable bulk key recovery on the cloud
MS Inci, B Gulmezoglu, G Irazoqui, T Eisenbarth, B Sunar
International Conference on Cryptographic Hardware and Embedded Systems, 368-388, 2016
1192016
Compact implementation and performance evaluation of block ciphers in ATtiny devices
T Eisenbarth, Z Gong, T Güneysu, S Heyse, S Indesteege, S Kerckhof, ...
International Conference on Cryptology in Africa, 172-187, 2012
1122012
Building a side channel based disassembler
T Eisenbarth, C Paar, B Weghenkel
Transactions on computational science X, 78-99, 2010
1042010
Security of autonomous systems employing embedded computing and sensors
AM Wyglinski, X Huang, T Padir, L Lai, TR Eisenbarth, ...
IEEE micro 33 (1), 80-86, 2013
1012013
Cross processor cache attacks
G Irazoqui, T Eisenbarth, B Sunar
Proceedings of the 11th ACM on Asia conference on computer and …, 2016
942016
Reconfigurable trusted computing in hardware
T Eisenbarth, T Güneysu, C Paar, AR Sadeghi, D Schellekens, M Wolf
Proceedings of the 2007 ACM workshop on Scalable trusted computing, 15-20, 2007
942007
Time-Area Optimized Public-Key Engines: -Cryptosystems as Replacement for Elliptic Curves?
A Bogdanov, T Eisenbarth, A Rupp, C Wolf
International Workshop on Cryptographic Hardware and Embedded Systems, 45-61, 2008
902008
MicroEliece: McEliece for embedded devices
T Eisenbarth, T Güneysu, S Heyse, C Paar
International Workshop on Cryptographic Hardware and Embedded Systems, 49-64, 2009
872009
Fine grain cross-vm attacks on xen and vmware
G Irazoqui, MS Inci, T Eisenbarth, B Sunar
2014 IEEE Fourth International Conference on Big Data and Cloud Computing …, 2014
78*2014
A faster and more realistic flush+ reload attack on AES
B Gülmezoğlu, MS Inci, G Irazoqui, T Eisenbarth, B Sunar
International Workshop on Constructive Side-Channel Analysis and Secure …, 2015
722015
Systematic reverse engineering of cache slice selection in Intel processors
G Irazoqui, T Eisenbarth, B Sunar
2015 Euromicro Conference on Digital System Design, 629-636, 2015
662015
Lucky 13 strikes back
G Irazoqui, MS Inci, T Eisenbarth, B Sunar
Proceedings of the 10th acm symposium on information, computer and …, 2015
652015
Differential cache-collision timing attacks on AES with applications to embedded CPUs
A Bogdanov, T Eisenbarth, C Paar, M Wienecke
Cryptographers’ Track at the RSA Conference, 235-251, 2010
642010
Das System kann den Vorgang jetzt nicht ausführen. Versuchen Sie es später erneut.
Artikel 1–20