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Shubham Rai
Shubham Rai
Robert Bosch Research
Verified email at de.bosch.com - Homepage
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Cited by
Year
Designing efficient circuits based on runtime-reconfigurable field-effect transistors
S Rai, J Trommer, M Raitza, T Mikolajick, WM Weber, A Kumar
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (3), 560-572, 2018
832018
20 Years of reconfigurable field-effect transistors: From concepts to future applications
T Mikolajick, G Galderisi, M Simon, S Rai, A Kumar, A Heinzig, WM Weber, ...
Solid-State Electronics 186, 108036, 2021
372021
Reconfigurable field effect transistors: A technology enablers perspective
T Mikolajick, G Galderisi, S Rai, M Simon, R Böckle, M Sistani, C Cakirlar, ...
Solid-State Electronics 194, 108381, 2022
362022
A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs
S Rai, A Rupani, D Walter, M Raitza, A Heinzig, T Baldauf, J Trommer, ...
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 605-608, 2018
342018
Emerging reconfigurable nanotechnologies: Can they support future electronics?
S Rai, S Srinivasa, P Cadareanu, X Yin, XS Hu, PE Gaillardon, ...
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
312018
Hardware watermarking using polymorphic inverter designs based on reconfigurable nanotechnologies
S Rai, A Rupani, P Nath, A Kumar
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 663-669, 2019
302019
Logic synthesis meets machine learning: Trading exactness for generalization
S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ...
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
292021
Security promises and vulnerabilities in emerging reconfigurable nanotechnology-based circuits
S Rai, S Patnaik, A Rupani, J Knechtel, O Sinanoglu, A Kumar
IEEE Transactions on Emerging Topics in Computing 10 (2), 763-778, 2020
272020
Technology mapping flow for emerging reconfigurable silicon nanowire transistors
S Rai, M Raitza, A Kumar
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 767-772, 2018
272018
A CORDIC based configurable activation function for ANN applications
G Raut, S Rai, SK Vishvakarma, A Kumar
2020 IEEE computer society annual symposium on VLSI (ISVLSI), 78-83, 2020
232020
RECON: resource-efficient CORDIC-based neuron architecture
G Raut, S Rai, SK Vishvakarma, A Kumar
IEEE Open Journal of Circuits and Systems 2, 170-181, 2021
222021
Discern: Distilling standard-cells for emerging reconfigurable nanotechnologies
S Rai, M Raitza, SS Sahoo, A Kumar
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 674-677, 2020
202020
A versatile mapping approach for technology mapping and graph optimization
AT Calvino, H Riener, S Rai, A Kumar, G De Micheli
2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 410-416, 2022
152022
RL-guided runtime-constrained heuristic exploration for logic synthesis
YV Peruvemba, S Rai, K Ahuja, A Kumar
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021
152021
Exploiting emerging reconfigurable technologies for secure devices
A Rupani, S Rai, A Kumar
2019 22nd Euromicro Conference on Digital System Design (DSD), 668-671, 2019
102019
Preserving self-duality during logic synthesis for emerging reconfigurable nanotechnologies
S Rai, H Riener, G De Micheli, A Kumar
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 354-359, 2021
92021
Germanium nanowire reconfigurable transistor model for predictive technology evaluation
JN Quijada, T Baldauf, S Rai, A Heinzig, A Kumar, WM Weber, ...
IEEE transactions on nanotechnology 21, 728-736, 2022
82022
Perspectives on emerging computation-in-memory paradigms
S Rai, M Liu, A Gebregiorgis, D Bhattacharjee, K Chakrabarty, ...
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
82021
Logic synthesis meets machine learning: Trading exactness for generalization. In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)
S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ...
IEEE, 2021
82021
Vertical IP protection of the next-generation devices: Quo vadis?
S Rai, S Garg, C Pilato, V Herdt, E Moussavi, D Sisejkovic, R Karri, ...
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
72021
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