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Co-authors
Ashkar AliIntel CorporationVerified email at psu.edu
Brian R. BennettWashington-Liberty High School; formerly Naval Research Laboratory (NRL), ONR, and MITVerified email at navy.mil
Matthew J. HollanderPennsylvania State UniversityVerified email at psu.edu
Ashish AgrawalDevcie Engineer at Components Research, Intel CorporationVerified email at intel.com
Joshua A. RobinsonProf. MatSE; Center for 2DLM; ATOMIC; 2D Crystal Consort.; The Pennsylvania State UniversityVerified email at psu.edu
Thomas N. JacksonRobert E. Kirby Chair Professor of Electrical Engineering, Penn State UniversityVerified email at psu.edu
Huichu LiuIntel Labs, Intel CorporationVerified email at intel.com
Rajiv MisraUniversity of Florida, The Pennsylvania State UniversityVerified email at ufl.edu
Prof. Mantu HudaitAssociate Professor of Electrical and Computer Engineering, Virginia TechVerified email at vt.edu
Robert M. WallaceUniversity of Texas at DallasVerified email at utdallas.edu
Chadwin D. YoungUniversity of Texas at DallasVerified email at utdallas.edu
Mehmet Onur BaykanEngineering Manager, Memory Technology Development Quality and Reliability, Intel CorporationVerified email at intel.com
Dheeraj MohataSenior Integration Engineer, GCS IncVerified email at gcsincorp.com
David GundlachNational Institute of Standards and TechnologyVerified email at nist.gov
Nikhil ShuklaUniversity of VirginiaVerified email at virginia.edu
J. Israel RamirezLumiode, IncVerified email at globalfoundries.com
Dmitry VekslerThe Aerospace Corporation
Bijesh RajamohananSanDisk