Sebastiano Strangio
Sebastiano Strangio
Verified email at unipi.it - Homepage
Title
Cited by
Cited by
Year
Microscopic origin of random telegraph noise fluctuations in aggressively scaled RRAM and its impact on read disturb variability
N Raghavan, R Degraeve, A Fantini, L Goux, S Strangio, B Govoreanu, ...
2013 IEEE International Reliability Physics Symposium (IRPS), 5E. 3.1-5E. 3.7, 2013
582013
Impact of TFET unidirectionality and ambipolarity on the performance of 6T SRAM cells
S Strangio, P Palestri, D Esseni, L Selmi, F Crupi, S Richter, QT Zhao, ...
IEEE Journal of the Electron Devices Society 3 (3), 223-232, 2015
542015
An ultralow-voltage energy-efficient level shifter
M Lanuzza, F Crupi, S Rao, R De Rose, S Strangio, G Iannaccone
IEEE Transactions on Circuits and Systems II: Express Briefs 64 (1), 61-65, 2016
432016
Mixed tunnel-FET/MOSFET level shifters: A new proposal to extend the tunnel-FET application domain
M Lanuzza, S Strangio, F Crupi, P Palestri, D Esseni
IEEE Transactions on Electron Devices 62 (12), 3973-3979, 2015
432015
Assessment of InAs/AlGaSb tunnel-FET virtual technology platform for low-power digital circuits
S Strangio, P Palestri, M Lanuzza, F Crupi, D Esseni, L Selmi
IEEE Transactions on Electron Devices 63 (7), 2749-2756, 2016
322016
Understanding of the intrinsic characteristics and memory trade-offs of sub-μA filamentary RRAM operation
L Goux, A Fantini, R Degraeve, N Raghavan, R Nigon, S Strangio, G Kar, ...
2013 Symposium on VLSI Technology, T162-T163, 2013
322013
Experimental demonstration of strained Si nanowire GAA n-TFETs and inverter operation with complementary TFET logic at low supply voltages
GV Luong, S Strangio, A Tiedemannn, S Lenk, S Trellenkamp, ...
Solid-State Electronics 115, 152-159, 2016
262016
Understanding the potential and limitations of tunnel FETs for low-voltage analog/mixed-signal circuits
F Settino, M Lanuzza, S Strangio, F Crupi, P Palestri, D Esseni, L Selmi
IEEE Transactions on Electron Devices 64 (6), 2736-2743, 2017
252017
On the bipolar resistive-switching characteristics of Al2O3- and HfO2-based memory cells operated in the soft-breakdown regime
L Goux, N Raghavan, A Fantini, R Nigon, S Strangio, R Degraeve, G Kar, ...
Journal of Applied Physics 116 (13), 134502, 2014
222014
Low frequency noise and gate bias instability in normally OFF AlGaN/GaN HEMTs
F Crupi, P Magnone, S Strangio, F Iucolano, G Meneghesso
IEEE Transactions on Electron Devices 63 (5), 2219-2222, 2016
202016
Digital and analog TFET circuits: Design and benchmark
S Strangio, F Settino, P Palestri, M Lanuzza, F Crupi, D Esseni, L Selmi
Solid-State Electronics 146, 50-65, 2018
142018
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits
S Strangio, P Palestri, M Lanuzza, D Esseni, F Crupi, L Selmi
Solid-State Electronics 128, 37-42, 2017
92017
Strained silicon complementary TFET SRAM: Experimental demonstration and simulations
GV Luong, S Strangio, AT Tiedemann, P Bernardy, S Trellenkamp, ...
IEEE Journal of the Electron Devices Society 6, 1033-1040, 2018
82018
Experimental characterization of the static noise margins of strained silicon complementary tunnel-FET SRAM
GV Luong, S Strangio, AT Tiedemann, P Bernardy, S Trellenkamp, ...
2017 47th European Solid-State Device Research Conference (ESSDERC), 42-45, 2017
72017
Experimental examination of tunneling paths in SiGe/Si gate-normal tunneling field-effect transistors
S Glass, N Von Den Driesch, S Strangio, C Schulte-Braucks, T Rieger, ...
Applied Physics Letters 111 (26), 263504, 2017
52017
Performance analysis of different SRAM cell topologies employing tunnel-FETs
S Strangio, P Palestri, D Esseni, L Selmi, F Crupi
72nd Device Research Conference, 143-144, 2014
52014
Analysis of TFET based 6T SRAM cells implemented with state of the art silicon nanowires
S Strangio, P Palestri, D Esseni, L Selmi, F Crupi
2014 44th European Solid State Device Research Conference (ESSDERC), 282-285, 2014
42014
Investigation of TFETs with Vertical Tunneling Path for Low Average Subthreshold Swing
S Glass, N Von Den Driesch, S Strangio, C Schulte-Braucks, T Rieger, ...
SSDM, 2017
32017
Benchmarks of a III–V TFET technology platform against the 10-nm CMOS technology node considering 28T full-adders
S Strangio, P Palestri, M Lanuzza, D Esseni, F Crupi, L Selmi
2016 Joint International EUROSOI Workshop and International Conference oná…, 2016
22016
Single Defect Discharge Events in Vertical-Nanowire Tunnel-FETs
A Fiore, J Franco, M Cho, F Crupi, S Strangio, PJ Roussel, R Rooyackers, ...
IEEE Transactions on Device and Materials Reliability 17 (1), 253-258, 2017
12017
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