| Multi2sim: A simulation framework to evaluate multicore-multithreaded processors R Ubal, J Sahuquillo, S Petit, P Lopez 19th International Symposium on Computer Architecture and High Performance …, 2007 | 250 | 2007 |
| Efficient interconnects for clustered microarchitectures JM Parcerisa, J Sahuquillo, A González, J Duato Proceedings. International Conference on Parallel Architectures and …, 2002 | 85 | 2002 |
| A simple power-aware scheduling for multicore systems when running real-time applications D Bautista, J Sahuquillo, H Hassan, S Petit, J Duato 2008 IEEE International Symposium on Parallel and Distributed Processing, 1-7, 2008 | 84 | 2008 |
| A user-focused evaluation of web prefetching algorithms J Domenech, A Pont, J Sahuquillo, JA Gil Computer communications 30 (10), 2213-2224, 2007 | 77 | 2007 |
| Web prefetching performance metrics: A survey J Domènech, JA Gil, J Sahuquillo, A Pont Performance Evaluation 63 (9-10), 988-1004, 2006 | 75 | 2006 |
| Exploiting temporal locality in drowsy cache policies S Petit, J Sahuquillo, JM Such, D Kaeli Proceedings of the 2nd conference on Computing frontiers, 371-377, 2005 | 74 | 2005 |
| Application clustering policies to address system fairness with intel’s cache allocation technology V Selfa, J Sahuquillo, L Eeckhout, S Petit, ME Gómez 2017 26th international conference on parallel architectures and compilation …, 2017 | 70 | 2017 |
| The exanest project: Interconnects, storage, and packaging for exascale systems M Katevenis, N Chrysos, M Marazakis, I Mavroidis, F Chaix, N Kallimanis, ... 2016 Euromicro Conference on Digital System Design (DSD), 60-67, 2016 | 64 | 2016 |
| An hybrid eDRAM/SRAM macrocell to implement first-level data caches A Valero, J Sahuquillo, S Petit, V Lorente, R Canal, P López, J Duato Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009 | 48 | 2009 |
| Using current web page structure to improve prefetching performance J Domenech, JA Gil, J Sahuquillo, A Pont Computer Networks 54 (9), 1404-1417, 2010 | 46 | 2010 |
| DDG: An efficient prefetching algorithm for current web generation J Domenech, JA Gil, J Sahuquillo, A Pont 2006 1st IEEE Workshop on Hot Topics in Web Systems and Technologies, 1-12, 2006 | 46 | 2006 |
| The impact of the web prefetching architecture on the limits of reducing user's perceived latency J Domenech, J Sahuquillo, JA Gil, A Pont 2006 IEEE/WIC/ACM International Conference on Web Intelligence (WI 2006 Main …, 2006 | 45 | 2006 |
| L1-bandwidth aware thread allocation in multicore SMT processors J Feliu, J Sahuquillo, S Petit, J Duato Proceedings of the 22nd international conference on Parallel architectures …, 2013 | 42 | 2013 |
| Perf&Fair: A progress-aware scheduler to enhance performance and fairness in SMT multicores J Feliu, J Sahuquillo, S Petit, J Duato IEEE Transactions on Computers 66 (5), 905-911, 2016 | 37 | 2016 |
| Addressing fairness in SMT multicores with a progress-aware scheduler J Feliu, J Sahuquillo, S Petit, J Duato 2015 ieee international parallel and distributed processing symposium, 187-196, 2015 | 36 | 2015 |
| Dweb model: representing Web 2.0 dynamism R Peña-Ortiz, J Sahuquillo, A Pont, JA Gil Computer Communications 32 (6), 1118-1128, 2009 | 34 | 2009 |
| Splitting the data cache: A survey J Sahuquillo, A Pont IEEE Concurrency 8 (3), 30-35, 2000 | 34 | 2000 |
| Cache-hierarchy contention-aware scheduling in CMPs J Feliu, S Petit, J Sahuquillo, J Duato IEEE Transactions on Parallel and Distributed Systems 25 (3), 581-590, 2013 | 33 | 2013 |
| An experimental framework for testing web prefetching techniques J Domenech, A Pont, J Sahuquillo, JA Gil Proceedings. 30th Euromicro Conference, 2004., 214-221, 2004 | 33 | 2004 |
| Power‐aware scheduling with effective task migration for real‐time multicore embedded systems JL March, J Sahuquillo, S Petit, H Hassan, J Duato Concurrency and Computation: Practice and Experience 25 (14), 1987-2001, 2013 | 31 | 2013 |
Salvador PetitUniversitat Politècnica de ValènciaVerified email at disca.upv.es
