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Vilas Sridharan
Vilas Sridharan
AMD, Inc.
Bestätigte E-Mail-Adresse bei amd.com - Startseite
Titel
Zitiert von
Zitiert von
Jahr
Memory errors in modern systems: The good, the bad, and the ugly
V Sridharan, N DeBardeleben, S Blanchard, KB Ferreira, J Stearley, ...
ACM SIGARCH Computer Architecture News 43 (1), 297-310, 2015
3652015
A study of DRAM failures in the field
V Sridharan, D Liberty
SC'12: Proceedings of the International Conference on High Performance …, 2012
3502012
A study of DRAM failures in the field
V Sridharan, D Liberty
SC'12: Proceedings of the International Conference on High Performance …, 2012
3502012
Eliminating microarchitectural dependency from architectural vulnerability
V Sridharan, DR Kaeli
2009 IEEE 15th International Symposium on High Performance Computer …, 2009
2352009
Feng shui of supercomputer memory: Positional effects in DRAM and SRAM faults
V Sridharan, J Stearley, N DeBardeleben, S Blanchard, S Gurumurthi
Proceedings of the International Conference on High Performance Computing …, 2013
2332013
Balancing performance and reliability in the memory hierarchy
GH Asadi, V Sridharan, MB Tahoori, D Kaeli
IEEE International Symposium on Performance Analysis of Systems and Software …, 2005
1312005
Using hardware vulnerability factors to enhance AVF analysis
V Sridharan, DR Kaeli
ACM SIGARCH Computer Architecture News 38 (3), 461-472, 2010
1062010
Real-world design and evaluation of compiler-managed GPU redundant multithreading
J Wadden, A Lyashevsky, S Gurumurthi, V Sridharan, K Skadron
ACM SIGARCH Computer Architecture News 42 (3), 73-84, 2014
1032014
Design and Analysis of an APU for Exascale Computing
T Vijayaraghavan, Y Eckert, GH Loh, MJ Schulte, M Ignatowski, ...
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
932017
XED: Exposing on-die error detection information for strong memory reliability
PJ Nair, V Sridharan, MK Qureshi
ACM SIGARCH Computer Architecture News 44 (3), 341-353, 2016
862016
Low-power, low-storage-overhead chipkill correct via multi-line error correction
X Jian, H Duwe, J Sartori, V Sridharan, R Kumar
Proceedings of the International Conference on High Performance Computing …, 2013
722013
Reducing data cache susceptibility to soft errors
V Sridharan, H Asadi, MB Tahoori, D Kaeli
IEEE Transactions on Dependable and Secure Computing 3 (4), 353-364, 2006
712006
Reducing data cache susceptibility to soft errors
V Sridharan, H Asadi, MB Tahoori, D Kaeli
IEEE Transactions on Dependable and Secure Computing 3 (4), 353-364, 2006
712006
Vulnerability analysis of L2 cache elements to single event upsets
H Asadi, V Sridharan, MB Tahoori, D Kaeli
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
692006
Quantifying software vulnerability
V Sridharan, DR Kaeli
Proceedings of the 2008 Workshop on Radiation effects and fault tolerance in …, 2008
682008
Resilient die-stacked DRAM caches
J Sim, GH Loh, V Sridharan, M O'Connor
ACM SIGARCH Computer Architecture News 41 (3), 416-427, 2013
672013
Detecting and correcting hard errors in a memory array
J Kalamatianos, JK John, R Gelinas, VK Sridharan, PE Nevius
US Patent 9,189,326, 2015
572015
Calculating architectural vulnerability factors for spatial multi-bit transient faults
M Wilkening, V Sridharan, S Li, F Previlon, S Gurumurthi, DR Kaeli
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 293-305, 2014
562014
Reliability-aware data placement for heterogeneous memory architecture
M Gupta, V Sridharan, D Roberts, A Prodromou, A Venkat, D Tullsen, ...
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
402018
Lessons learned from memory errors observed over the lifetime of Cielo
S Levy, KB Ferreira, N DeBardeleben, T Siddiqua, V Sridharan, ...
SC18: International Conference for High Performance Computing, Networking …, 2018
362018
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