Rainer Doemer
TitleCited byYear
SpecC: Specification language and methodology
DD Gajski, J Zhu, R Dömer, A Gerstlauer, S Zhao
Springer Science & Business Media, 2012
7902012
System design: a practical guide with SpecC
A Gerstlauer, R Dömer, J Peng, DD Gajski
Springer Science & Business Media, 2001
1892001
System-on-chip environment: A SpecC-based framework for heterogeneous MPSoC design
R Dömer, A Gerstlauer, J Peng, D Shin, L Cai, H Yu, S Abdi, DD Gajski
EURASIP Journal on Embedded Systems 2008, 5, 2008
1432008
OSCAR: Optimum simultaneous scheduling, allocation and resource binding based on integer programming
B Landwehr, P Marwedel, R Dömer
Dekanat Informatik, Univ., 1994
1161994
Specfic language reference manual
R Dömer, A Gerstlauer, D Gajski
Specfic consortium, version 2, 2001
1092001
Essential issues in codesign
DD Gajski, J Zhu, R Dömer
Hardware/Software Co-Design: Principles and Practice, 1-45, 1997
751997
Hardware-dependent software
W Ecker, W Müller, R Dömer
Hardware-dependent Software, 1-13, 2009
74*2009
Syntax and semantics of the Specfic language
J Zhu, R Dömer, DD Gajski
Proceedings of the Synthesis and System Integration of Mixed Technologies 1997, 1997
721997
Built-in chaining: Introducing complex components into architectural synthesis
P Marwedel, B Landwehr, R Domer
Proceedings of ASP-DAC'97: Asia and South Pacific Design Automation …, 1997
511997
Quantitative analysis of transaction level models for the AMBA bus
G Schirner, R Domer
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
502006
Embedded software generation from system level design languages
H Yu, R Dömer, D Gajski
Proceedings of the 2004 Asia and South Pacific Design Automation Conference …, 2004
492004
C-based interactive RTL design methodology
D Shin, A Gerstlauer, R Dömer, D Gajski
Center for Embedded Computer Systems, 2003
492003
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
G Schirner, R Dömer
ACM Transactions on Embedded Computing Systems (TECS) 8 (1), 4, 2008
482008
Introducing preemptive scheduling in abstract RTOS models using result oriented modeling
G Schirner, R Dömer
Proceedings of the conference on Design, automation and test in Europe, 122-127, 2008
462008
Out-of-order parallel simulation for ESL design
W Chen, X Han, R Dömer
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 141-146, 2012
452012
System-level communication modeling for network-on-chip synthesis
A Gerstlauer, D Shin, R Dömer, DD Gajski
Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005
452005
Abstract, multifaceted modeling of embedded processors for system level design
G Schirner, A Gerstlauer, R Domer
Proceedings of the 2007 Asia and South Pacific Design Automation Conference …, 2007
442007
Automatic generation of transaction level models for rapid design space exploration
D Shin, A Gerstlauer, J Peng, R Dömer, DD Gajski
Proceedings of the 4th international conference on Hardware/software …, 2006
402006
The formal execution semantics of SpecC
W Mueller, R Dömer, A Gerstlauer
Proceedings of the 15th international symposium on System Synthesis, 150-155, 2002
392002
Automatic layer-based generation of system-on-chip bus communication models
A Gerstlauer, D Shin, J Peng, R Domer, DD Gajski
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007
372007
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