Prof. Yao-Wen Chang
Prof. Yao-Wen Chang
Bestätigte E-Mail-Adresse bei ntu.edu.tw - Startseite
Titel
Zitiert von
Zitiert von
Jahr
B*-trees: A new representation for non-slicing floorplans
YC Chang, YW Chang, GM Wu, SW Wu
Proceedings of the 37th Annual Design Automation Conference, 458-463, 2000
6532000
TCG: A transitive closure graph-based representation for non-slicing floorplans
JM Lin, YW Chang
Proceedings of the 38th annual Design Automation Conference, 764-769, 2001
3162001
Electronic design automation: synthesis, verification, and test
LT Wang, YW Chang, KTT Cheng
Morgan Kaufmann, 2009
2492009
NTUplace3: An analytical placer for large-scale mixed-size designs with preplaced blocks and density constraints
TC Chen, ZW Jiang, TC Hsu, HC Chen, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
2342008
Universal switch modules for FPGA design
YW Chang, DF Wong, CK Wong
ACM Transactions on Design Automation of Electronic Systems (TODAES) 1 (1 …, 1996
2131996
BioRoute: A network-flow-based routing algorithm for the synthesis of digital microfluidic biochips
PH Yuh, CL Yang, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
1882008
Modern floorplanning based on B/sup*/-tree and fast simulated annealing
TC Chen, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
1552006
Method of analytical placement with weighted-average wirelength model
V Balabanov, MK Hsu, YW Chang
US Patent 8,689,164, 2014
1542014
Recent research and emerging challenges in physical design for manufacturability/reliability
CW Lin, MC Tsai, KY Lee, TC Chen, TC Wang, YW Chang
2007 Asia and South Pacific Design Automation Conference, 238-243, 2007
1172007
TCG-S: orthogonal coupling of P/sup*/-admissible representations for general floorplans
JM Lin, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004
1132004
Analog placement based on symmetry-island formulation
PH Lin, YW Chang, SC Lin
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
1122009
A novel layout decomposition algorithm for triple patterning lithography
SY Fang, YW Chang, WY Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
992014
Placement of defect-tolerant digital microfluidic biochips using the T-tree formulation
PH Yuh, CL Yang, YW Chang
ACM Journal on Emerging Technologies in Computing Systems (JETC) 3 (3), 13-es, 2007
972007
Voltage island aware floorplanning for power and timing optimization
WP Lee, HY Liu, YW Chang
2006 IEEE/ACM International Conference on Computer Aided Design, 389-394, 2006
922006
A high-quality mixed-size analytical placer considering preplaced blocks and density constraints
TC Chen, ZW Jiang, TC Hsu, HC Chen, YW Chang
Proceedings of the 2006 IEEE/ACM International Conference on Computer-Aided …, 2006
922006
Crosstalk-driven interconnect optimization by simultaneous gate and wire sizing
IHR Jiang, YW Chang, JY Jou
IEEE Transactions on computer-aided design of integrated circuits and …, 2000
922000
TSV-aware analytical placement for 3D IC designs
MK Hsu, YW Chang, V Balabanov
Proceedings of the 48th Design Automation Conference, 664-669, 2011
882011
Cross-contamination aware design methodology for pin-constrained digital microfluidic biochips
CCY Lin, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
882011
Modern floorplanning based on fast simulated annealing
TC Chen, YW Chang
Proceedings of the 2005 international symposium on Physical design, 104-112, 2005
872005
An integer-linear-programming-based routing algorithm for flip-chip designs
JW Fang, CH Hsu, YW Chang
IEEE Transactions on computer-aided design of integrated circuits and …, 2008
822008
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