Tiramisu: A polyhedral compiler for expressing fast and portable code R Baghdadi, J Ray, MB Romdhane, E Del Sozzo, A Akkas, Y Zhang, ... 2019 IEEE/ACM International Symposium on Code Generation and Optimization …, 2019 | 365 | 2019 |
Workload-aware power optimization strategy for asymmetric multiprocessors E Del Sozzo, GC Durelli, EMG Trainiti, A Miele, MD Santambrogio, ... 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 531-534, 2016 | 43 | 2016 |
Pushing the level of abstraction of digital system design: A survey on how to program fpgas ED Sozzo, D Conficconi, A Zeni, M Salaris, D Sciuto, MD Santambrogio ACM Computing Surveys 55 (5), 1-48, 2022 | 37 | 2022 |
A common backend for hardware acceleration on FPGA E Del Sozzo, R Baghdadi, S Amarasinghe, MD Santambrogio 2017 IEEE International Conference on Computer Design (ICCD), 427-430, 2017 | 32 | 2017 |
A comprehensive methodology to optimize FPGA designs via the roofline model M Siracusa, E Del Sozzo, M Rabozzi, L Di Tucci, S Williams, D Sciuto, ... IEEE Transactions on Computers 71 (8), 1903-1915, 2021 | 30 | 2021 |
A unified backend for targeting FPGAs from DSLs E Del Sozzo, R Baghdadi, S Amarasinghe, MD Santambrogio 2018 IEEE 29th International Conference on Application-specific Systems …, 2018 | 27 | 2018 |
A pipelined and scalable dataflow implementation of convolutional neural networks on FPGA M Bacis, G Natale, E Del Sozzo, MD Santambrogio 2017 IEEE International Parallel and Distributed Processing Symposium …, 2017 | 25 | 2017 |
A cad-based methodology to optimize hls code via the roofline model M Siracusa, L Di Tucci, M Rabozzi, S Williams, ED Sozzo, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 24 | 2020 |
A framework for customizable fpga-based image registration accelerators D Conficconi, E D'Arnese, E Del Sozzo, D Sciuto, MD Santambrogio The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021 | 20 | 2021 |
On the automation of high level synthesis of convolutional neural networks E Del Sozzo, A Solazzo, A Miele, MD Santambrogio 2016 IEEE International Parallel and Distributed Processing Symposium …, 2016 | 20 | 2016 |
Fpga-based pairhmm forward algorithm for dna variant calling D Sampietro, C Crippa, L Di Tucci, E Del Sozzo, MD Santambrogio 2018 IEEE 29th International Conference on Application-specific Systems …, 2018 | 19 | 2018 |
A scalable FPGA design for cloud n-body simulation E Del Sozzo, M Rabozzi, L Di Tucci, D Sciuto, MD Santambrogio 2018 IEEE 29th international conference on application-specific systems …, 2018 | 18 | 2018 |
OXiGen: a tool for automatic acceleration of c functions into dataflow FPGA-based kernels F Peverelli, M Rabozzi, E Del Sozzo, MD Santambrogio 2018 IEEE international parallel and distributed processing symposium …, 2018 | 18 | 2018 |
Hardware design automation of convolutional neural networks A Solazzo, E Del Sozzo, I De Rose, M De Silvestri, GC Durelli, ... 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 224-229, 2016 | 17 | 2016 |
On the automation of radiomics-based identification and characterization of nsclc E D’Arnese, GW Di Donato, E Del Sozzo, M Sollini, D Sciuto, ... IEEE Journal of Biomedical and Health Informatics 26 (6), 2670-2679, 2022 | 16 | 2022 |
Cicero: A domain-specific architecture for efficient regular expression matching D Parravicini, D Conficconi, ED Sozzo, C Pilato, MD Santambrogio ACM Transactions on Embedded Computing Systems (TECS) 20 (5s), 1-24, 2021 | 16 | 2021 |
Enhancing the scalability of multi-fpga stencil computations via highly optimized hdl components E Reggiani, E Del Sozzo, D Conficconi, G Natale, C Moroni, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 14 (3), 1-33, 2021 | 16 | 2021 |
An energy-efficient domain-specific architecture for regular expressions D Conficconi, E Del Sozzo, F Carloni, A Comodi, A Scolari, ... IEEE Transactions on Emerging Topics in Computing 11 (1), 3-17, 2022 | 15 | 2022 |
A highly scalable and efficient parallel design of N-body simulation on FPGA E Del Sozzo, L Di Tucci, MD Santambrogio 2017 IEEE international parallel and distributed processing symposium …, 2017 | 15 | 2017 |
Tiramisu: A code optimization framework for high performance systems R Baghdadi, J Ray, MB Romdhane, E Del Sozzo, P Suriana, S Kamil, ... arXiv preprint arXiv:1804.10694, 2018 | 12 | 2018 |