A literature review on sampling techniques in semiconductor manufacturing J Nduhura-Munga, G Rodriguez-Verjan, S Dauzère-Pérès, C Yugma, ... IEEE Transactions on Semiconductor Manufacturing 26 (2), 188-195, 2013 | 65 | 2013 |
Flexibility measures for qualification management in wafer fabs C Johnzén, S Dauzère-Pérès, P Vialletelle Production Planning and Control 22 (1), 81-90, 2011 | 62 | 2011 |
A smart sampling algorithm to minimize risk dynamically S Dauzere-Péres, JL Rouveyrol, C Yugma, P Vialletelle 2010 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 307-310, 2010 | 54 | 2010 |
A literature review on variability in semiconductor manufacturing: The next forward leap to Industry 4.0 K Dequeant, P Vialletelle, P Lemaire, ML Espinouse 2016 Winter Simulation Conference (WSC), 2598-2609, 2016 | 43 | 2016 |
A sampling-based approach for managing lot release in time constraint tunnels in semiconductor manufacturing A Lima, V Borodin, S Dauzère-Pérès, P Vialletelle International Journal of Production Research 59 (3), 860-884, 2021 | 33 | 2021 |
Dynamic management of controls in semiconductor manufacturing JN Munga, S Dauzère-Pérès, P Vialletelle, C Yugma 2011 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 1-6, 2011 | 25 | 2011 |
Quality and exposure control in semiconductor manufacturing. Part I: Modelling B Bettayeb, S Bassetto, P Vialletelle, M Tollenaere International Journal of Production Research 50 (23), 6835-6851, 2012 | 23 | 2012 |
Optimisation of the process control in a semiconductor company: model and case study of defectivity sampling M Shanoun, S Bassetto, S Bastoini, P Vialletelle International Journal of Production Research 49 (13), 3873-3890, 2011 | 22 | 2011 |
Impact of qualification management on scheduling in semiconductor manufacturing C Johnzén, P Vialletelle, S Dauzere-Péres, C Yugma, A Derreumaux 2008 Winter Simulation Conference, 2059-2066, 2008 | 18 | 2008 |
Sampling-based release control of multiple lots in time constraint tunnels A Lima, V Borodin, S Dauzère-Pérès, P Vialletelle Computers in Industry 110, 3-11, 2019 | 16 | 2019 |
A mathematical programming approach for optimizing control plans in semiconductor manufacturing JN Munga, S Dauzère-Pérès, C Yugma, P Vialletelle International Journal of Production Economics 160, 213-219, 2015 | 16* | 2015 |
Generic data model for semiconductor manufacturing supply chains G Laipple, S Dauzère-Pérès, T Ponsignon, P Vialletelle 2018 Winter Simulation Conference (WSC), 3615-3626, 2018 | 15 | 2018 |
Finite capacity planning algorithm for semiconductor industry considering lots priority E Mhiri, M Jacomino, F Mangione, P Vialletelle, G Lepelletier IFAC-PapersOnLine 48 (3), 1598-1603, 2015 | 15 | 2015 |
Analyzing different dispatching policies for probability estimation in time constraint tunnels in semiconductor manufacturing A Lima, V Borodin, S Dauzère-Pérès, P Vialletelle 2017 Winter Simulation Conference (WSC), 3543-3554, 2017 | 14 | 2017 |
A step toward capacity planning at finite capacity in semiconductor manufacturing E Mhiri, M Jacomino, F Mangione, P Vialletelle, G Lepelletier Proceedings of the Winter Simulation Conference 2014, 2239-2250, 2014 | 14 | 2014 |
Importance of qualification management for wafer fabs C Johnzen, S Dauzere-Peres, P Vialletelle, C Yugma 2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 166-169, 2007 | 14 | 2007 |
Optimized design of control plans based on risk exposure and resources capabilities B Bettayeb, P Vialletelle, S Bassetto, M Tollenaere 2010 International Symposium on Semiconductor Manufacturing (ISSM), 1-4, 2010 | 13 | 2010 |
Optimized management of excursions in semiconductor manufacturing JN Munga, P Vialletelle, S Dauzere-Péres, C Yugma Proceedings of the 2011 Winter Simulation Conference (WSC), 2100-2107, 2011 | 12 | 2011 |
Industrial implementation of a dynamic sampling algorithm in semiconductor manufacturing: Approach and challenges JN Munga, S Dauzère-Pérès, P Vialletelle, C Yugma Proceedings of the 2012 Winter Simulation Conference (WSC), 1-9, 2012 | 9 | 2012 |
Quality and exposure control in semiconductor manufacturing. Part II: Evaluation B Bettayeb, S Bassetto, P Vialletelle, M Tollenaere International Journal of Production Research 50 (23), 6852-6869, 2012 | 9 | 2012 |