| Arithmetic operators on GF (2m) for cryptographic applications: performance-power consumption-security tradeoffs D Pamula Université Rennes 1, 2012 | 18 | 2012 |
| Arithmetic operators on GF (2m) for cryptographic applications: performance-power consumption-security tradeoffs D Pamula Université Rennes 1, 2012 | 18 | 2012 |
| Securing video stream captured in real time D Pamuła, A Ziębiński Przegląd Elektrotechniczny 86 (9), 167-169, 2010 | 14 | 2010 |
| \ textrm {GF}(2^ m) Finite-Field Multipliers with Reduced Activity Variations D Pamula, A Tisserand International Workshop on the Arithmetic of Finite Fields, 152-167, 2012 | 13 | 2012 |
| Hardware implementation of DBNS recoding for ECC processor T Chabrier, D Pamula, A Tisserand Signals, Systems and Computers (ASILOMAR), 2010 Conference Record of the …, 2010 | 13 | 2010 |
| Hardware implementation of the MD5 algorithm. D Pamula, A Ziebinski IFAC Proceedings Volumes 42 (1), 45-50, 2009 | 8 | 2009 |
| Fast and Secure Finite Field Multipliers D Pamula, A Tisserand Digital System Design (DSD), 2015 Euromicro Conference on, 653-660, 2015 | 7 | 2015 |
| Analysis of GF (2233) multipliers regarding Elliptic Curve Cryptosystem applications. D Pamuła, E Hrynkiewicz, A Tisserand IFAC Proceedings Volumes 45 (7), 271-276, 2012 | 7 | 2012 |
| Area-speed efficient modular architecture for GF (2 m) multipliers dedicated for cryptographic applications D Pamula, E Hrynkiewicz Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2013 IEEE …, 2013 | 3 | 2013 |
| Multiplication in GF(2m): area and time dependency/efficiency/complexity analysis. D Pamula, E Hrynkiewicz, A Tisserand IFAC Proceedings Volumes 43 (24), 28-33, 2010 | 3 | 2010 |
| Analiza algorytmów mnożenia w ciele GF (2m) D Pamuła, E Hrynkiewicz, A Tisserand Pomiary Automatyka Kontrola 57 (1), 58-60, 2011 | 1 | 2011 |
| Hardware Random Recoding: Redundant Representations of Numbers, Side Channel Analysis, Elliptic Curve Cryptography T Chabrier, D Pamula, A Tisserand Journées' Codage et Cryptographie', 2011 | | 2011 |
| Arithmetic Level Countermeasures for ECC Coprocessor A Tisserand, T Chabrier, D Pamula Claude Shannon Institute Workshop onCoding & Cryptography, 2010 | | 2010 |
| Using the programmable array to process the geological phenomena data J Flak, D Pamuła, A ZIĘBIŃSKI GEOLOGY & INFORMATION TECHNOLOGY, 29, 0 | | |
| Hardware Random Recoding T Chabrier, D Pamula, A Tisserand | | |
