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Tifenn Hirtzlin
Tifenn Hirtzlin
CEA - LETI
Verified email at cea.fr
Title
Cited by
Cited by
Year
Vowel recognition with four coupled spin-torque nano-oscillators
M Romera, P Talatchian, S Tsunegi, F Abreu Araujo, V Cros, P Bortolotti, ...
Nature 563 (7730), 230-234, 2018
5182018
Neural-like computing with populations of superparamagnetic basis functions
A Mizrahi, T Hirtzlin, A Fukushima, H Kubota, S Yuasa, J Grollier, ...
Nature communications 9 (1), 1533, 2018
1882018
In-memory and error-immune differential RRAM implementation of binarized deep neural networks
M Bocquet, T Hirztlin, JO Klein, E Nowak, E Vianello, JM Portal, ...
2018 IEEE International Electron Devices Meeting (IEDM), 20.6. 1-20.6. 4, 2018
882018
Digital biologically plausible implementation of binarized neural networks with differential hafnium oxide resistive memory arrays
T Hirtzlin, M Bocquet, B Penkovsky, JO Klein, E Nowak, E Vianello, ...
Frontiers in neuroscience 13, 1383, 2020
662020
Synaptic metaplasticity in binarized neural networks
A Laborieux, M Ernoult, T Hirtzlin, D Querlioz
Nature communications 12 (1), 2549, 2021
612021
Outstanding bit error tolerance of resistive ram-based binarized neural networks
T Hirtzlin, M Bocquet, JO Klein, E Nowak, E Vianello, JM Portal, ...
2019 IEEE International Conference on Artificial Intelligence Circuits and …, 2019
482019
Low voltage 25Gbps silicon Mach-Zehnder modulator in the O-band
D Perez-Galacho, C Baudot, T Hirtzlin, S Messaoudène, N Vulliet, ...
Optics Express 25 (10), 11217-11222, 2017
482017
Stochastic computing for hardware implementation of binarized neural networks
T Hirtzlin, B Penkovsky, M Bocquet, JO Klein, JM Portal, D Querlioz
IEEE Access 7, 76394-76403, 2019
442019
A memristor-based Bayesian machine
KE Harabi, T Hirtzlin, C Turck, E Vianello, R Laurent, J Droulez, ...
Nature Electronics 6 (1), 52-63, 2023
252023
Implementing binarized neural networks with magnetoresistive ram without error correction
T Hirtzlin, B Penkovsky, JO Klein, N Locatelli, AF Vincent, M Bocquet, ...
2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 1-5, 2019
202019
Hybrid analog-digital learning with differential rram synapses
T Hirtzlin, M Bocquet, M Ernoult, JO Klein, E Nowak, E Vianello, JM Portal, ...
2019 IEEE International Electron Devices Meeting (IEDM), 22.6. 1-22.6. 4, 2019
172019
Low power in-memory implementation of ternary neural networks with resistive ram-based synapse
A Laborieux, M Bocquet, T Hirtzlin, JO Klein, LH Diez, E Nowak, ...
2020 2nd IEEE International Conference on Artificial Intelligence Circuits …, 2020
132020
Experimental demonstration of multilevel resistive random access memory programming for up to two months stable neural networks inference accuracy
E Esmanhotto, T Hirtzlin, D Bonnet, N Castellani, JM Portal, D Querlioz, ...
Advanced Intelligent Systems 4 (11), 2200145, 2022
122022
Circuit-level evaluation of the generation of truly random bits with superparamagnetic tunnel junctions
D Vodenicarevic, N Locatelli, A Mizrahi, T Hirtzlin, JS Friedman, J Grollier, ...
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2018
122018
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks
F Moro, E Esmanhotto, T Hirtzlin, N Castellani, A Trabelsi, T Dalgaty, ...
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 380-383, 2022
112022
In-memory resistive ram implementation of binarized neural networks for medical applications
B Penkovsky, M Bocquet, T Hirtzlin, JO Klein, E Nowak, E Vianello, ...
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 690-695, 2020
102020
Bringing uncertainty quantification to the extreme-edge with memristor-based Bayesian neural networks
D Bonnet, T Hirtzlin, A Majumdar, T Dalgaty, E Esmanhotto, V Meli, ...
Nature Communications 14 (1), 7530, 2023
92023
1S1R optimization for high‐frequency inference on binarized spiking neural networks
J Minguet Lopez, Q Rafhay, M Dampfhoffer, L Reganaz, N Castellani, ...
Advanced Electronic Materials 8 (8), 2200323, 2022
92022
Implementation of ternary weights with resistive RAM using a single sense operation per synapse
A Laborieux, M Bocquet, T Hirtzlin, JO Klein, E Nowak, E Vianello, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (1), 138-147, 2020
92020
1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing
JM Lopez, F Rummens, L Reganaz, A Heraud, T Hirtzlin, L Grenouillet, ...
2022 IEEE International Memory Workshop (IMW), 1-4, 2022
72022
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