| Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi M Damschen, H Riebler, G Vaz, C Plessl | 27* | |
| FPGA-accelerated key search for cold-boot attacks against AES H Riebler, T Kenter, C Sorge, C Plessl 2013 International Conference on Field-Programmable Technology (FPT), 386-389, 2013 | 13 | 2013 |
| Transparent Acceleration for Heterogeneous Platforms With Compilation to OpenCL H Riebler, G Vaz, T Kenter, C Plessl ACM Transactions on Architecture and Code Optimization (TACO) 16 (2), 1-26, 2019 | 10 | 2019 |
| Deferring Accelerator Offloading Decisions to Application Runtime G Vaz, H Riebler, T Kenter, C Plessl Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). IEEE …, 2014 | 8 | 2014 |
| Using just-in-time code generation for transparent resource management in heterogeneous systems H Riebler, G Vaz, C Plessl, EMG Trainiti, GC Durelli, E Del Sozzo, ... 2016 IEEE 2nd International Forum on Research and Technologies for Society …, 2016 | 7 | 2016 |
| Reconstructing AES Key Schedules from Decayed Memory with FPGAs H Riebler, T Kenter, C Plessl, C Sorge Field-Programmable Custom Computing Machines (FCCM), 2014 IEEE 22nd Annual …, 2014 | 7 | 2014 |
| Runtime resource management in heterogeneous system architectures: The save approach GC Durelli, M Pogliani, A Miele, C Plessl, H Riebler, MD Santambrogio, ... 2014 IEEE International Symposium on Parallel and Distributed Processing …, 2014 | 6 | 2014 |
| Potential and methods for embedding dynamic offloading decisions into application code G Vaz, H Riebler, T Kenter, C Plessl Computers & Electrical Engineering 55, 91-111, 2016 | 4 | 2016 |
| A computation of D (9) using FPGA Supercomputing L Van Hirtum, P De Causmaecker, J Goemaere, T Kenter, H Riebler, ... arXiv preprint arXiv:2304.03039, 2023 | 3 | 2023 |
| Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs H Riebler, M Lass, R Mittendorf, T Löcke, C Plessl ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (3), 1-23, 2017 | 2 | 2017 |
| Automated code acceleration targeting heterogeneous OpenCL devices H Riebler, G Vaz, T Kenter, C Plessl Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of …, 2018 | 1 | 2018 |
| POSTER: Automated Code Acceleration Targeting Heterogeneous OpenCL Devices H Riebler, G Vaz, T Kenter, C Plessl | 1 | 2018 |
| Efficient parallel branch-and-bound search on FPGAs using work stealing and instance-specific designs. H Riebler University of Paderborn, Germany, 2019 | | 2019 |
| Subproject C2: On-The-Fly Compute Centers I: Heterogeneous Execution Environments T Hansmeier, T Kenter, M Meyer, H Riebler, M Platzner, C Plessl | | |
| FPGAs (ReConFig18) Additional Reviewers A Sanaullah, A Rodriguez, A Engel, A Otero, B Green, D Danopoulos, ... | | |
| Opportunities for deferring application partitioning and accelerator synthesis to runtime–Extended Abstract– T Kenter, G Vaz, H Riebler, C Plessl | | |
| FPGAs (ReConFig14) Papers by Session General Sessions G Vaz, H Riebler, T Kenter, C Plessl, H Nakahara, H Nakanishi, K Iwai, ... | | |
| ReConFig 2014 Best Paper Award G Vaz, H Riebler, T Kenter, C Plessl | | |
Christian PlesslProfessor, Paderborn UniversityBestätigte E-Mail-Adresse bei uni-paderborn.de
